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https://github.com/brain-hackers/u-boot-brain
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![Albert ARIBAUD \\(3ADEV\\)](/assets/img/avatar_default.png)
The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
255 lines
7.4 KiB
C
255 lines
7.4 KiB
C
/*
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* (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
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*
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* (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
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*
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* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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*
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* Configuration for the flea3 board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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/* High Level Configuration Options */
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#define CONFIG_MX35
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_SYS_GENERIC_BOARD
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/* Only in case the value is not present in mach-types.h */
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#ifndef MACH_TYPE_FLEA3
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#define MACH_TYPE_FLEA3 3668
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#endif
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#define CONFIG_MACH_TYPE MACH_TYPE_FLEA3
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/* Set TEXT at the beginning of the NOR flash */
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#define CONFIG_SYS_TEXT_BASE 0xA0000000
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/* This is required to setup the ESDC controller */
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
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/*
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* Hardware drivers
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
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#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
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#define CONFIG_MXC_SPI
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#define CONFIG_MXC_GPIO
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/*
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* UART (console)
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART3_BASE
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/*
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* Command definition
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*/
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_DNS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_MII
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#define CONFIG_NET_RETRY_COUNT 100
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
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/*
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* Ethernet on SOC (FEC)
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*/
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_FEC_MXC_PHYADDR 0x1
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#define CONFIG_MII
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#define CONFIG_ARP_TIMEOUT 200UL
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x10000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/*
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
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#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_GBL_DATA_OFFSET)
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/*
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* MTD Command for mtdparts
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*/
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
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#define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \
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"32m(rootfb)," \
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"64m(pcache)," \
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"64m(app1)," \
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"10m(app2),-(spool);" \
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"physmap-flash.0:512k(u-boot),64k(env1)," \
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"64k(env2),3776k(kernel1),3776k(kernel2)"
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/*
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
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/* Monitor at beginning of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
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CONFIG_SYS_MONITOR_LEN)
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#define CONFIG_ENV_IS_IN_FLASH
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/*
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* CFI FLASH driver setup
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*/
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#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
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#define CONFIG_FLASH_CFI_DRIVER
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/* A non-standard buffered write algorithm */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
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#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
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/*
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* NAND FLASH driver setup
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*/
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#define CONFIG_NAND_MXC
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#define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_LARGEPAGE
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/*
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* Default environment and default scripts
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* to update uboot and load kernel
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*/
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#define CONFIG_HOSTNAME flea3
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip_sta=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
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"addip=if test -n ${ipdyn};then run addip_dyn;" \
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"else run addip_sta;fi\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttymxc2,${baudrate}\0" \
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"addmisc=setenv bootargs ${bootargs} ${misc}\0" \
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"loadaddr=80800000\0" \
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"kernel_addr_r=80800000\0" \
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"hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
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"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
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"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
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"flash_self=run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr}\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r}\0" \
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"net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
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"tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
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"net_self=if run net_self_load;then " \
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"run ramargs addip addtty addmtd addmisc;" \
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"bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
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"else echo Images not loades;fi\0" \
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"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
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"update=protect off ${uboot_addr} +40000;" \
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"erase ${uboot_addr} +40000;" \
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"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
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"upd=if run load;then echo Updating u-boot;if run update;" \
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"then echo U-Boot updated;" \
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"else echo Error updating u-boot !;" \
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"echo Board without bootloader !!;" \
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"fi;" \
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"else echo U-Boot not downloaded..exiting;fi\0" \
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"bootcmd=run net_nfs\0"
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#endif /* __CONFIG_H */
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