mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 12:46:17 +09:00
a405764c1e
Most of the I2C slaves support accesses in the typical style
that is : read/write series of bytes at particular address offset.
These transactions look like:"
(1) START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP"
However there are certain devices which support accesses in
terms of the transactions as follows:
(2) "START:Address:Tx:Txdata[0..n1]:Clock_stretching:
RESTART:Address:Rx:data[0..n2]"
Here Txdata is typically a command and some associated data,
similarly Rxdata could be command status plus some data received
as a response to the command sent.
Type (1) transactions are currently supportd in the
i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs,
RTC, etc fall in this category.
To handle type (2) along with type (1) transactions,
i2c_read() function has been modified.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
|
||
|---|---|---|
| .. | ||
| bfin-twi_i2c.c | ||
| davinci_i2c.c | ||
| designware_i2c.c | ||
| designware_i2c.h | ||
| fsl_i2c.c | ||
| fti2c010.c | ||
| fti2c010.h | ||
| i2c_core.c | ||
| kona_i2c.c | ||
| Makefile | ||
| mv_i2c.c | ||
| mv_i2c.h | ||
| mvtwsi.c | ||
| mxc_i2c.c | ||
| mxs_i2c.c | ||
| omap24xx_i2c.c | ||
| omap24xx_i2c.h | ||
| pca9564_i2c.c | ||
| ppc4xx_i2c.c | ||
| rcar_i2c.c | ||
| s3c24x0_i2c.c | ||
| s3c24x0_i2c.h | ||
| sh_i2c.c | ||
| sh_sh7734_i2c.c | ||
| soft_i2c.c | ||
| tegra_i2c.c | ||
| tsi108_i2c.c | ||
| u8500_i2c.c | ||
| u8500_i2c.h | ||
| zynq_i2c.c | ||