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126fe70d77
LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
78 lines
1.3 KiB
Plaintext
78 lines
1.3 KiB
Plaintext
/*
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* Device Tree Include file for Freescale Layerscape-1046A family SoC.
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*
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* Copyright (C) 2016, Freescale Semiconductor
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*
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* Mingkai Hu <Mingkai.hu@nxp.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/include/ "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A QDS Board";
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aliases {
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spi0 = &qspi;
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spi1 = &dspi0;
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};
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};
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&dspi0 {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <1000000>; /* input clock */
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3500000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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&qspi {
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bus-num = <0>;
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status = "okay";
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qflash0: s25fl128s@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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