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aad4659a2f
Maximum bus width supported by some i.MX6 boards is not 8bit like others. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while some boards support only 4bit interface. Due to this reason the mmc 8bit default mode fails on these boards. To rectify this, define maximum bus width supported by these boards (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com> cc: stefano Babic <sbabic@denx.de> cc: Andy Fleming <afleming@gmail.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> |
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| .. | ||
| arm_pl180_mmci.c | ||
| arm_pl180_mmci.h | ||
| bfin_sdh.c | ||
| davinci_mmc.c | ||
| dw_mmc.c | ||
| exynos_dw_mmc.c | ||
| fsl_esdhc.c | ||
| ftsdc010_esdhc.c | ||
| gen_atmel_mci.c | ||
| Makefile | ||
| mmc_spi.c | ||
| mmc.c | ||
| mv_sdhci.c | ||
| mxcmmc.c | ||
| mxsmmc.c | ||
| omap_hsmmc.c | ||
| pxa_mmc_gen.c | ||
| pxa_mmc.h | ||
| s5p_sdhci.c | ||
| sdhci.c | ||
| sh_mmcif.c | ||
| sh_mmcif.h | ||
| spl_mmc.c | ||
| tegra_mmc.c | ||