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https://github.com/brain-hackers/u-boot-brain
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660d5f0d49
"reset.c" and "cpu.c" have no architecture-specific code at all. Others are applicable to either ARC CPU. This change is a preparation to submission of ARCv2 architecture port. Even though ARCv1 and ARCv2 ISAs are not binary compatible most of built-in modules still have the same programming model - AUX registers are mapped in the same addresses and hold the same data (new featues extend existing ones). So only low-level assembly code (start-up, interrupt handlers) is left as CPU(actually ISA)-specific. This significantyl simplifies maintenance of multiple CPUs/ISAs. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Igor Guryanov <guryanov@synopsys.com>
23 lines
407 B
Makefile
23 lines
407 B
Makefile
#
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# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += cache.o
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obj-y += cpu.o
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obj-y += interrupts.o
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obj-y += sections.o
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obj-y += relocate.o
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obj-y += strchr-700.o
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obj-y += strcmp.o
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obj-y += strcpy-700.o
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obj-y += strlen.o
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obj-y += memcmp.o
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obj-y += memcpy-700.o
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obj-y += memset.o
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obj-y += reset.o
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obj-y += timer.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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