mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
601147b06a
On the raspberry pi, you can disable the serial port to gain dynamic frequency scaling which can get handy at times. However, in such a configuration the serial controller gets its rx queue filled up with zero bytes which then happily get transmitted on to whoever calls getc() today. This patch adds detection logic for that case by checking whether the RX pin is mapped to GPIO15 and disables the mini uart if it is not mapped properly. That way we can leave the driver enabled in the tree and can determine during runtime whether serial is usable or not, having a single binary that allows for uart and non-uart operation. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Simon Glass <sjg@chromium.org>
129 lines
3.2 KiB
C
129 lines
3.2 KiB
C
/*
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* Copyright (C) 2012 Vikram Narayananan
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* <vikram186@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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struct bcm2835_gpios {
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struct bcm2835_gpio_regs *reg;
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};
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static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
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{
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struct bcm2835_gpios *gpios = dev_get_priv(dev);
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unsigned val;
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val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
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val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
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writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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return 0;
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}
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static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
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int value)
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{
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struct bcm2835_gpios *gpios = dev_get_priv(dev);
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unsigned val;
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gpio_set_value(gpio, value);
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val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
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val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
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writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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return 0;
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}
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static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio)
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{
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unsigned val;
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val = readl(&gpios->reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]);
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return (val >> BCM2835_GPIO_COMMON_SHIFT(gpio)) & 0x1;
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}
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static int bcm2835_gpio_get_value(struct udevice *dev, unsigned gpio)
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{
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const struct bcm2835_gpios *gpios = dev_get_priv(dev);
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return bcm2835_get_value(gpios, gpio);
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}
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static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio,
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int value)
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{
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struct bcm2835_gpios *gpios = dev_get_priv(dev);
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u32 *output_reg = value ? gpios->reg->gpset : gpios->reg->gpclr;
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writel(1 << BCM2835_GPIO_COMMON_SHIFT(gpio),
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&output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]);
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return 0;
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}
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int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
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{
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struct bcm2835_gpios *gpios = dev_get_priv(dev);
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u32 val;
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val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
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return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
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}
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static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
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{
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int funcid = bcm2835_gpio_get_func_id(dev, offset);
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switch (funcid) {
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case BCM2835_GPIO_OUTPUT:
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return GPIOF_OUTPUT;
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case BCM2835_GPIO_INPUT:
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return GPIOF_INPUT;
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default:
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return GPIOF_FUNC;
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}
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}
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static const struct dm_gpio_ops gpio_bcm2835_ops = {
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.direction_input = bcm2835_gpio_direction_input,
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.direction_output = bcm2835_gpio_direction_output,
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.get_value = bcm2835_gpio_get_value,
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.set_value = bcm2835_gpio_set_value,
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.get_function = bcm2835_gpio_get_function,
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};
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static int bcm2835_gpio_probe(struct udevice *dev)
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{
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struct bcm2835_gpios *gpios = dev_get_priv(dev);
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struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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uc_priv->bank_name = "GPIO";
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uc_priv->gpio_count = BCM2835_GPIO_COUNT;
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gpios->reg = (struct bcm2835_gpio_regs *)plat->base;
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return 0;
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}
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U_BOOT_DRIVER(gpio_bcm2835) = {
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.name = "gpio_bcm2835",
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.id = UCLASS_GPIO,
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.ops = &gpio_bcm2835_ops,
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.probe = bcm2835_gpio_probe,
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.flags = DM_FLAG_PRE_RELOC,
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.priv_auto_alloc_size = sizeof(struct bcm2835_gpios),
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};
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