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![]() SerDes PLLs may not lock reliably at 5 G VCO configuration(A006384) and at cold temperatures(A006475), workaround recalibrate the PLLs with some SerDes configuration Both these errata are only applicable for b4 rev1. So, make workaround for these errata conditional, depending upon soc version. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> |
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.. | ||
b4_pbi.cfg | ||
b4_rcw.cfg | ||
b4860qds_crossbar_con.h | ||
b4860qds_qixis.h | ||
b4860qds.c | ||
b4860qds.h | ||
ddr.c | ||
eth_b4860qds.c | ||
law.c | ||
Makefile | ||
pci.c | ||
tlb.c |