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https://github.com/brain-hackers/u-boot-brain
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![wdenk](/assets/img/avatar_default.png)
- remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
235 lines
5.2 KiB
C
235 lines
5.2 KiB
C
/*
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* (C) Copyright 2002
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* Lineo, Inc. <www.lineo.com>
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* Bernhard Kuhn <bkuhn@lineo.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/proc/ptrace.h>
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extern void reset_cpu(ulong addr);
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/* we always count down the max. */
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#define TIMER_LOAD_VAL 0xffff
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/* macro to read the 16 bit timer */
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#define READ_TIMER (tmr->TC_CV)
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AT91PS_TC tmr;
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void enable_interrupts (void)
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{
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return;
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}
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int disable_interrupts (void)
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{
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return 0;
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}
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void bad_mode(void)
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{
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panic("Resetting CPU ...\n");
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reset_cpu(0);
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}
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void show_regs(struct pt_regs * regs)
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{
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unsigned long flags;
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const char *processor_modes[]=
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{ "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
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"UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
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"USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
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"UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
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};
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flags = condition_codes(regs);
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printf("pc : [<%08lx>] lr : [<%08lx>]\n"
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"sp : %08lx ip : %08lx fp : %08lx\n",
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instruction_pointer(regs),
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regs->ARM_lr, regs->ARM_sp,
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regs->ARM_ip, regs->ARM_fp);
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printf("r10: %08lx r9 : %08lx r8 : %08lx\n",
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regs->ARM_r10, regs->ARM_r9,
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regs->ARM_r8);
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printf("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
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regs->ARM_r7, regs->ARM_r6,
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regs->ARM_r5, regs->ARM_r4);
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printf("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
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regs->ARM_r3, regs->ARM_r2,
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regs->ARM_r1, regs->ARM_r0);
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printf("Flags: %c%c%c%c",
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flags & CC_N_BIT ? 'N' : 'n',
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flags & CC_Z_BIT ? 'Z' : 'z',
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flags & CC_C_BIT ? 'C' : 'c',
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flags & CC_V_BIT ? 'V' : 'v');
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printf(" IRQs %s FIQs %s Mode %s%s\n",
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interrupts_enabled(regs) ? "on" : "off",
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fast_interrupts_enabled(regs) ? "on" : "off",
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processor_modes[processor_mode(regs)],
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thumb_mode(regs) ? " (T)" : "");
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}
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void do_undefined_instruction(struct pt_regs *pt_regs)
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{
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printf("undefined instruction\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_software_interrupt(struct pt_regs *pt_regs)
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{
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printf("software interrupt\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_prefetch_abort(struct pt_regs *pt_regs)
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{
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printf("prefetch abort\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_data_abort(struct pt_regs *pt_regs)
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{
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printf("data abort\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_not_used(struct pt_regs *pt_regs)
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{
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printf("not used\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_fiq(struct pt_regs *pt_regs)
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{
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printf("fast interrupt request\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_irq(struct pt_regs *pt_regs)
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{
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printf("interrupt request\n");
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show_regs(pt_regs);
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bad_mode();
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}
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static ulong timestamp;
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static ulong lastinc;
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int interrupt_init (void)
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{
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tmr = AT91C_BASE_TC0;
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/* enables TC1.0 clock */
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*AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
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*AT91C_TCB0_BCR = 0;
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*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
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tmr->TC_CCR = AT91C_TC_CLKDIS;
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tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK; /* set to MCLK/2 */
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tmr->TC_IDR = ~0ul;
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tmr->TC_RC = TIMER_LOAD_VAL;
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lastinc = TIMER_LOAD_VAL;
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tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
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timestamp = 0;
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return (0);
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}
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/*
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* timer without interrupts
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*/
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void reset_timer(void)
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{
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reset_timer_masked();
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}
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ulong get_timer (ulong base)
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{
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return get_timer_masked() - base;
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}
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void set_timer (ulong t)
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{
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timestamp = t;
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}
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void udelay(unsigned long usec)
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{
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udelay_masked(usec);
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}
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void reset_timer_masked(void)
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{
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/* reset time */
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lastinc = READ_TIMER;
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timestamp = 0;
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}
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ulong get_timer_masked(void)
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{
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ulong now = READ_TIMER;
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if (now >= lastinc)
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{
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/* normal mode */
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timestamp += now - lastinc;
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} else {
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/* we have an overflow ... */
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timestamp += now + TIMER_LOAD_VAL - lastinc;
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}
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lastinc = now;
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return timestamp;
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}
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void udelay_masked(unsigned long usec)
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{
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ulong tmo;
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tmo = usec / 1000;
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tmo *= CFG_HZ;
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tmo /= 1000;
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reset_timer_masked();
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while(get_timer_masked() < tmo);
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/*NOP*/;
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}
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