mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
1f47e2aca4
common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXoxw9wAKCRDKSWXLKUoM IbQxAKCK23yTy4FoN8oTGTYsbmLOA9kVUQCbBx8lg4nBeA8ihSaAnY+HMDF37YI= =Lg54 -----END PGP SIGNATURE----- Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2020.07 common: - Align ENV_FAT_INTERFACE - Fix MAC address source print log - Improve based autodetection code xilinx: - Enable netconsole Microblaze: - Setup default ENV_OFFSET/ENV_SECT_SIZE Zynq: - Multiple DT updates/fixes - Use DEVICE_TREE environment variable for DTB selection - Switch to single zynq configuration - Enable NOR flash via DM - Minor SPL print removal - Enable i2c mux driver ZynqMP: - Print multiboot register - Enable cache commands in mini mtest - Multiple DT updates/fixes - Fix firmware probing when driver is not enabled - Specify 3rd backup RAM boot mode in SPL - Add SPL support for zcu102 v1.1 and zcu111 revA - Redesign debug uart enabling and psu_init delay - Enable full u-boot run from EL3 - Enable u-boot.itb generation without ATF with U-Boot in EL3 Versal: - Enable distro default - Enable others SPI flashes - Enable systems without DDR Drivers: - Gem: - Flush memory after freeing - Handle mdio bus separately - Watchdog: - Get rid of unused global data pointer - Enable window watchdog timer - Serial: - Change reinitialization logic in zynq serial driver Signed-off-by: Tom Rini <trini@konsulko.com>
384 lines
7.4 KiB
Plaintext
384 lines
7.4 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) 2019 Marek Vasut <marex@denx.de>
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*/
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/dts-v1/;
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15-pinctrl.dtsi"
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#include "stm32mp15xxaa-pinctrl.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/mfd/st,stpmic1.h>
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/ {
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aliases {
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eeprom0 = &eeprom0;
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};
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memory@c0000000 {
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device_type = "memory";
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reg = <0xC0000000 0x40000000>;
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};
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};
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&cec {
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pinctrl-names = "default";
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pinctrl-0 = <&cec_pins_a>;
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status = "okay";
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};
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&dcmi {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dcmi_pins_a>;
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pinctrl-1 = <&dcmi_sleep_pins_a>;
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};
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&dts {
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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pmic: stpmic@33 {
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compatible = "st,stpmic1";
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reg = <0x33>;
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interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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status = "okay";
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regulators {
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compatible = "st,stpmic1-regulators";
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ldo1-supply = <&v3v3>;
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ldo2-supply = <&v3v3>;
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ldo3-supply = <&vdd_ddr>;
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ldo5-supply = <&v3v3>;
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ldo6-supply = <&v3v3>;
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pwr_sw1-supply = <&bst_out>;
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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st,mask-reset;
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regulator-initial-mode = <0>;
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regulator-over-current-protection;
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-over-current-protection;
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regulator-initial-mode = <0>;
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};
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vdda: ldo1 {
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regulator-name = "vdda";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO1 0>;
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};
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v2v8: ldo2 {
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regulator-name = "v2v8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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interrupts = <IT_CURLIM_LDO2 0>;
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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regulator-over-current-protection;
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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interrupts = <IT_CURLIM_LDO4 0>;
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};
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vdd_sd: ldo5 {
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regulator-name = "vdd_sd";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO5 0>;
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regulator-boot-on;
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};
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v1v8: ldo6 {
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regulator-name = "v1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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interrupts = <IT_CURLIM_LDO6 0>;
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-always-on;
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regulator-over-current-protection;
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};
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bst_out: boost {
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regulator-name = "bst_out";
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interrupts = <IT_OCP_BOOST 0>;
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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interrupts = <IT_OCP_OTG 0>;
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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interrupts = <IT_OCP_SWOUT 0>;
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regulator-active-discharge;
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};
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};
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onkey {
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compatible = "st,stpmic1-onkey";
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interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
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interrupt-names = "onkey-falling", "onkey-rising";
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power-off-time-sec = <10>;
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status = "okay";
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};
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watchdog {
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compatible = "st,stpmic1-wdt";
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status = "disabled";
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};
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};
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eeprom0: eeprom@50 {
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compatible = "atmel,24c02";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&i2c5 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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};
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&ipcc {
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status = "okay";
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};
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&iwdg2 {
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timeout-sec = <32>;
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status = "okay";
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};
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&m4_rproc {
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mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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mbox-names = "vq0", "vq1", "shutdown";
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status = "okay";
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};
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&pwr_regulators {
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vdd-supply = <&vdd>;
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vdd_3v3_usbfs-supply = <&vdd_usb>;
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};
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&qspi {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a &qspi_bk2_pins_a>;
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pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a &qspi_bk2_sleep_pins_a>;
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reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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flash0: mx66l51235l@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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flash1: mx66l51235l@1 {
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compatible = "jedec,spi-nor";
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reg = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&rng1 {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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&sdmmc1 {
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pinctrl-names = "default", "opendrain", "sleep";
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pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
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pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
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broken-cd;
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st,sig-dir;
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st,neg-edge;
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st,use-ckin;
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bus-width = <4>;
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vmmc-supply = <&vdd_sd>;
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status = "okay";
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};
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&sdmmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
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non-removable;
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no-sd;
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no-sdio;
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st,sig-dir;
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st,neg-edge;
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bus-width = <8>;
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vmmc-supply = <&v3v3>;
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status = "okay";
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins_a>;
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status = "disabled";
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};
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&timers2 {
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/* spare dmas for other usage (un-delete to enable pwm capture) */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm2_pins_a>;
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pinctrl-names = "default";
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status = "okay";
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};
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timer@1 {
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status = "okay";
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};
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};
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&timers6 {
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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timer@5 {
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status = "okay";
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};
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};
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&timers8 {
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm8_pins_a>;
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pinctrl-names = "default";
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status = "okay";
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};
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timer@7 {
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status = "okay";
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};
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};
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&timers12 {
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm12_pins_a>;
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pinctrl-names = "default";
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status = "okay";
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};
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timer@11 {
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status = "okay";
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};
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart4_pins_a>;
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status = "okay";
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};
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&usbh_ehci {
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phys = <&usbphyc_port0>;
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phy-names = "usb";
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status = "okay";
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};
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&usbotg_hs {
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dr_mode = "peripheral";
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phys = <&usbphyc_port1 0>;
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phy-names = "usb2-phy";
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vbus-supply = <&vbus_otg>;
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status = "okay";
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};
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&usbphyc {
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status = "okay";
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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};
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&usbphyc_port1 {
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phy-supply = <&vdd_usb>;
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};
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