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https://github.com/brain-hackers/u-boot-brain
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d239d9d946
Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
50 lines
710 B
Plaintext
50 lines
710 B
Plaintext
if ARCH_IMX8M
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config IMX8M
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bool
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select ROM_UNIFIED_SECTIONS
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config IMX8MQ
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bool
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select IMX8M
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config IMX8MM
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bool
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select IMX8M
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config IMX8MN
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bool
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select IMX8M
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config SYS_SOC
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default "imx8m"
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choice
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prompt "NXP i.MX8M board select"
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optional
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config TARGET_IMX8MQ_EVK
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bool "imx8mq_evk"
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select IMX8MQ
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select IMX8M_LPDDR4
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config TARGET_IMX8MM_EVK
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bool "imx8mm LPDDR4 EVK board"
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select IMX8MM
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select SUPPORT_SPL
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select IMX8M_LPDDR4
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config TARGET_IMX8MN_EVK
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bool "imx8mn DDR4 EVK board"
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select IMX8MN
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select SUPPORT_SPL
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select IMX8M_DDR4
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endchoice
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source "board/freescale/imx8mq_evk/Kconfig"
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source "board/freescale/imx8mm_evk/Kconfig"
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source "board/freescale/imx8mn_evk/Kconfig"
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endif
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