York Sun 62f739fe46 powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only ... Only the first DIMM of first controller should fall back to raw timing parameters if SPD is missing or corrupted. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>		2012-08-23 12:16:56 -05:00
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cpu	powerpc/mpc8xxx DDR: Fall back to raw timing for first controller only	2012-08-23 12:16:56 -05:00
include/asm	powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving	2012-08-23 12:16:55 -05:00
lib	powerpc/mpc8xxx: use topology registers to calculate number of cores	2012-08-23 12:16:54 -05:00
config.mk	Handle most LDSCRIPT setting centrally	2011-04-30 00:59:47 +02:00