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![Peng Fan](/assets/img/avatar_default.png)
Move cpu desc code to cpu driver directory and name it imx8_cpu.c No functional change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
183 lines
3.4 KiB
C
183 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 NXP
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*/
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#include <common.h>
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#include <cpu.h>
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#include <dm.h>
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#include <thermal.h>
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#include <asm/arch/sci/sci.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch-imx/cpu.h>
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#include <asm/armv8/cpu.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct cpu_imx_platdata {
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const char *name;
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const char *rev;
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const char *type;
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u32 cpurev;
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u32 freq_mhz;
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};
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const char *get_imx8_type(u32 imxtype)
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{
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switch (imxtype) {
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case MXC_CPU_IMX8QXP:
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case MXC_CPU_IMX8QXP_A0:
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return "QXP";
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case MXC_CPU_IMX8QM:
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return "QM";
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default:
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return "??";
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}
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}
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const char *get_imx8_rev(u32 rev)
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{
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switch (rev) {
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case CHIP_REV_A:
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return "A";
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case CHIP_REV_B:
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return "B";
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default:
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return "?";
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}
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}
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const char *get_core_name(void)
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{
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if (is_cortex_a35())
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return "A35";
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else if (is_cortex_a53())
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return "A53";
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else if (is_cortex_a72())
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return "A72";
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else
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return "?";
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}
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#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
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static int cpu_imx_get_temp(void)
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{
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struct udevice *thermal_dev;
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int cpu_tmp, ret;
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ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
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&thermal_dev);
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if (!ret) {
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ret = thermal_get_temp(thermal_dev, &cpu_tmp);
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if (ret)
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return 0xdeadbeef;
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} else {
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return 0xdeadbeef;
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}
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return cpu_tmp;
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}
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#else
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static int cpu_imx_get_temp(void)
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{
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return 0;
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}
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#endif
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int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
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{
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struct cpu_imx_platdata *plat = dev_get_platdata(dev);
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int ret;
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if (size < 100)
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return -ENOSPC;
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ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
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plat->type, plat->rev, plat->name, plat->freq_mhz);
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if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
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buf = buf + ret;
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size = size - ret;
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ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
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}
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snprintf(buf + ret, size - ret, "\n");
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return 0;
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}
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static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
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{
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struct cpu_imx_platdata *plat = dev_get_platdata(dev);
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info->cpu_freq = plat->freq_mhz * 1000;
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info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
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return 0;
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}
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static int cpu_imx_get_count(struct udevice *dev)
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{
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return 4;
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}
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static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size)
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{
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snprintf(buf, size, "NXP");
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return 0;
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}
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static const struct cpu_ops cpu_imx8_ops = {
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.get_desc = cpu_imx_get_desc,
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.get_info = cpu_imx_get_info,
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.get_count = cpu_imx_get_count,
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.get_vendor = cpu_imx_get_vendor,
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};
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static const struct udevice_id cpu_imx8_ids[] = {
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{ .compatible = "arm,cortex-a35" },
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{ .compatible = "arm,cortex-a53" },
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{ }
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};
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static ulong imx8_get_cpu_rate(void)
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{
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ulong rate;
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int ret;
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int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
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SC_R_A53 : SC_R_A72;
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ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
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(sc_pm_clock_rate_t *)&rate);
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if (ret) {
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printf("Could not read CPU frequency: %d\n", ret);
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return 0;
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}
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return rate;
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}
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static int imx8_cpu_probe(struct udevice *dev)
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{
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struct cpu_imx_platdata *plat = dev_get_platdata(dev);
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u32 cpurev;
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cpurev = get_cpu_rev();
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plat->cpurev = cpurev;
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plat->name = get_core_name();
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plat->rev = get_imx8_rev(cpurev & 0xFFF);
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plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
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plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
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return 0;
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}
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U_BOOT_DRIVER(cpu_imx8_drv) = {
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.name = "imx8x_cpu",
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.id = UCLASS_CPU,
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.of_match = cpu_imx8_ids,
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.ops = &cpu_imx8_ops,
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.probe = imx8_cpu_probe,
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.platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
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.flags = DM_FLAG_PRE_RELOC,
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};
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