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https://github.com/brain-hackers/u-boot-brain
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5c99045699
PIC32 internal flash devices are parallel NOR flash divided into number of banks to allow erase-programming in one while fetch and execution continues on other. As the flash banks are memory mapped stored code can be executed directly from flash (XIP), also there is additional hardware logic to prefetch and cache contents to improve execution performance. These flash can also be used to store user data (like environment). Flash erase and programming are handled by on-chip NVM controller. Driver implemented driver model but MTD is not really support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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| .. | ||
| nand | ||
| onenand | ||
| spi | ||
| ubi | ||
| altera_qspi.c | ||
| at45.c | ||
| cfi_flash.c | ||
| cfi_mtd.c | ||
| dataflash.c | ||
| ftsmc020.c | ||
| jedec_flash.c | ||
| Kconfig | ||
| Makefile | ||
| mtd_uboot.c | ||
| mtd-uclass.c | ||
| mtdconcat.c | ||
| mtdcore.c | ||
| mtdcore.h | ||
| mtdpart.c | ||
| mw_eeprom.c | ||
| pic32_flash.c | ||
| st_smi.c | ||
| stm32_flash.c | ||
| stm32_flash.h | ||