mirror of
https://github.com/brain-hackers/u-boot-brain
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b617a0d7b8
This patch adds the option to configure a comphy to 5G XFI mode.
In order to configure the comphy to 5G XFI, update
the comphy node in the device-tree:
phy2 {
phy-type = <PHY_TYPE_SFI>;
phy-speed = <PHY_SPEED_5_15625G>;
};
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
/*
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* Copyright (C) 2015-2016 Marvell International Ltd.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _COMPHY_DATA_H_
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#define _COMPHY_DATA_H_
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#define PHY_SPEED_1_25G 0
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#define PHY_SPEED_1_5G 1
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#define PHY_SPEED_2_5G 2
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#define PHY_SPEED_3G 3
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#define PHY_SPEED_3_125G 4
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#define PHY_SPEED_5G 5
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#define PHY_SPEED_5_15625G 6
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#define PHY_SPEED_6G 7
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#define PHY_SPEED_6_25G 8
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#define PHY_SPEED_10_3125G 9
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#define PHY_SPEED_MAX 10
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#define PHY_SPEED_INVALID 0xff
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#define PHY_TYPE_UNCONNECTED 0
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#define PHY_TYPE_PEX0 1
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#define PHY_TYPE_PEX1 2
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#define PHY_TYPE_PEX2 3
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#define PHY_TYPE_PEX3 4
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#define PHY_TYPE_SATA0 5
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#define PHY_TYPE_SATA1 6
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#define PHY_TYPE_SATA2 7
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#define PHY_TYPE_SATA3 8
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#define PHY_TYPE_SGMII0 9
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#define PHY_TYPE_SGMII1 10
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#define PHY_TYPE_SGMII2 11
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#define PHY_TYPE_SGMII3 12
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#define PHY_TYPE_QSGMII 13
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#define PHY_TYPE_USB3_HOST0 14
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#define PHY_TYPE_USB3_HOST1 15
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#define PHY_TYPE_USB3_DEVICE 16
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#define PHY_TYPE_XAUI0 17
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#define PHY_TYPE_XAUI1 18
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#define PHY_TYPE_XAUI2 19
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#define PHY_TYPE_XAUI3 20
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#define PHY_TYPE_RXAUI0 21
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#define PHY_TYPE_RXAUI1 22
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#define PHY_TYPE_SFI 23
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#define PHY_TYPE_IGNORE 24
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#define PHY_TYPE_MAX 25
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#define PHY_TYPE_INVALID 0xff
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#define PHY_POLARITY_NO_INVERT 0
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#define PHY_POLARITY_TXD_INVERT 1
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#define PHY_POLARITY_RXD_INVERT 2
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#define PHY_POLARITY_ALL_INVERT \
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(PHY_POLARITY_TXD_INVERT | PHY_POLARITY_RXD_INVERT)
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#define UTMI_PHY_TO_USB3_HOST0 0
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#define UTMI_PHY_TO_USB3_HOST1 1
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#define UTMI_PHY_TO_USB3_DEVICE0 2
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#define UTMI_PHY_INVALID 0xff
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#endif /* _COMPHY_DATA_H_ */
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