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![]() This adds dcache support for dwc2. The DMA buffers must be DMA aligned and is flushed for outgoing transactions before starting transfer. For ingoing transactions it is invalidated after the transfer has finished. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [trini: Update to apply again on top of DM patches] Signed-off-by: Tom Rini <trini@konsulko.com> |
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dwc3 | ||
emul | ||
eth | ||
gadget | ||
host | ||
musb | ||
musb-new | ||
phy | ||
ulpi | ||
Kconfig |