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![Simon Glass](/assets/img/avatar_default.png)
Since both I2C and SPI are converted to Kconfig, we can convert cros_ec to Kconfig for these buses. LPC will need to wait until driver mode PCI is available. Signed-off-by: Simon Glass <sjg@chromium.org>
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_PEACH_PIT_H
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#define __CONFIG_PEACH_PIT_H
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_SPI_FLASH
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#define CONFIG_ENV_SPI_BASE 0x12D30000
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#define FLASH_SIZE (0x4 << 20)
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#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
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#define CONFIG_SPI_BOOTING
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#include <configs/exynos5420-common.h>
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#include <configs/exynos5-dt-common.h>
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#define CONFIG_BOARD_COMMON
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_TEXT_BASE 0x23E00000
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
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/* select serial console configuration */
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#define CONFIG_SERIAL3 /* use SERIAL 3 */
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
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#define CONFIG_SYS_PROMPT "Peach-Pit # "
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#define CONFIG_IDENT_STRING " for Peach-Pit"
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#define CONFIG_VIDEO_PARADE
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/* Display */
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#define CONFIG_LCD
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#ifdef CONFIG_LCD
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#define CONFIG_EXYNOS_FB
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#define CONFIG_EXYNOS_DP
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#define LCD_BPP LCD_COLOR16
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#endif
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#define CONFIG_POWER_TPS65090_EC
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#define CONFIG_USB_XHCI
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#define CONFIG_USB_XHCI_EXYNOS
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/* DRAM Memory Banks */
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#define CONFIG_NR_DRAM_BANKS 4
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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#endif /* __CONFIG_PEACH_PIT_H */
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