mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
61e2ff8e82
As we have a proper clock framework driver, these macros are not needed, so drop them and clean up the whitelist. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* include/configs/ulcb.h
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* This file is ULCB board configuration.
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*
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* Copyright (C) 2017 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ULCB_H
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#define __ULCB_H
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#undef DEBUG
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#include "rcar-gen3-common.h"
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/* SCIF */
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#define CONFIG_CONS_SCIF2
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#define CONFIG_CONS_INDEX 2
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/* [A] Hyper Flash */
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/* use to RPC(SPI Multi I/O Bus Controller) */
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/* Ethernet RAVB */
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#define CONFIG_BITBANGMII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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/* XTAL_CLK : 33.33MHz */
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#define CONFIG_SYS_CLK_FREQ 33333333u
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/* Generic Timer Definitions (use in assembler source) */
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#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
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/* CPLD SPI */
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#define CONFIG_CMD_SPI
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#define CONFIG_SOFT_SPI
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#define SPI_DELAY udelay(0)
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#define SPI_SDA(val) ulcb_softspi_sda(val)
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#define SPI_SCL(val) ulcb_softspi_scl(val)
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#define SPI_READ ulcb_softspi_read()
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#ifndef __ASSEMBLY__
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void ulcb_softspi_sda(int);
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void ulcb_softspi_scl(int);
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unsigned char ulcb_softspi_read(void);
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#endif
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/* i2c */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SH
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#define CONFIG_SYS_I2C_SLAVE 0x60
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#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
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#define CONFIG_SYS_I2C_SH_SPEED0 400000
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#define CONFIG_SH_I2C_DATA_HIGH 4
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#define CONFIG_SH_I2C_DATA_LOW 5
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#define CONFIG_SH_I2C_CLOCK 10000000
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#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
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#define CONFIG_SYS_MMC_ENV_DEV 1
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#define CONFIG_SYS_MMC_ENV_PART 2
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#endif /* __ULCB_H */
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