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https://github.com/brain-hackers/u-boot-brain
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![John Rigby](/assets/img/avatar_default.png)
Based on ST-Ericsson internal git repo. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Albert Aribaud <albert.aribaud@free.fr>
48 lines
1.5 KiB
C
48 lines
1.5 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2009
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __U8500_H
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#define __U8500_H
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/*
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* base register values for U8500
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*/
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#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock
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Management Unit */
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#define CFG_SDRAMC_BASE 0x903CF000 /* SDRAMC cnf registers */
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#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
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/*
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* U8500 GPIO register base for 9 banks
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*/
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#define U8500_GPIO_0_BASE 0x8012E000
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#define U8500_GPIO_1_BASE 0x8012E080
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#define U8500_GPIO_2_BASE 0x8000E000
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#define U8500_GPIO_3_BASE 0x8000E080
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#define U8500_GPIO_4_BASE 0x8000E100
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#define U8500_GPIO_5_BASE 0x8000E180
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#define U8500_GPIO_6_BASE 0x8011E000
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#define U8500_GPIO_7_BASE 0x8011E080
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#define U8500_GPIO_8_BASE 0xA03FE000
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#endif /* __U8500_H */
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