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![Tom Rini](/assets/img/avatar_default.png)
This converts the following to Kconfig: CONFIG_CONS_INDEX We have existing entries for this option in a number of places, with different guards on them. They're also sometimes used for things not directly inside of the serial driver. First, introduce a new symbol to guard the use of CONFIG_CONS_INDEX, so that in the case where we don't need this for the serial driver, but for some other use, we can still do it. Next, consolidate all of these into the single entry in drivers/serial/Kconfig. Finally, introduce CONS_INDEX_[023456] so that we can imply a correct value here to make the defconfig side of this smaller. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rework a lot of the logic here, such that I took authorship from Adam, but kept his S-o-B line] Signed-off-by: Tom Rini <trini@konsulko.com>
192 lines
5.0 KiB
C
192 lines
5.0 KiB
C
/*
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* Copyright (C) 2011 Freescale Semiconductor, Inc.
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* Jason Liu <r64343@freescale.com>
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*
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* Configuration settings for Freescale MX53 low cost board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO
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#include <asm/arch/imx-regs.h>
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SYS_FSL_CLK
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_REVISION_TAG
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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/* Eth Configs */
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#define CONFIG_MII
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE FEC_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 0x1F
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/* USB Configs */
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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/* PMIC Controller */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_DIALOG_POWER
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#define CONFIG_POWER_FSL
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/* Command definition */
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"fdt_addr=0x71000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
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"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
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"loadbootscript=" \
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"load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo ERROR: Cannot load the DT; " \
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"exit; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x70000000
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#define CONFIG_SYS_MEMTEST_END 0x70010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 2
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
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#define PHYS_SDRAM_2 CSD1_BASE_ADDR
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#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
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#define PHYS_SDRAM_SIZE (gd->ram_size)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
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#define CONFIG_LBA48
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#endif
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/* Framebuffer and LCD */
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#define CONFIG_PREBOOT
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#endif /* __CONFIG_H */
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