mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-13 06:36:16 +09:00
324873e7c2
Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
165 lines
4.5 KiB
C
165 lines
4.5 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* Configuation settings for the AT91SAM9261EK board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
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#ifdef CONFIG_AT91SAM9G10
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#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
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#else
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#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
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#endif
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#include <asm/hardware.h>
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_ATMEL_LEGACY
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#define CONFIG_SYS_TEXT_BASE 0x21f00000
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/*
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* Hardware drivers
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*/
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/* LCD */
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#define LCD_BPP LCD_COLOR8
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#define CONFIG_LCD_LOGO
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#undef LCD_TEST_PATTERN
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#define CONFIG_LCD_INFO
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#define CONFIG_LCD_INFO_BELOW_LOGO
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#define CONFIG_ATMEL_LCD
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#ifdef CONFIG_AT91SAM9261EK
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#define CONFIG_ATMEL_LCD_BGR555
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#endif
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x04000000
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#define CONFIG_SYS_INIT_SP_ADDR \
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(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_DBW_8
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/* our ALE is AD22 */
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
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/* our CLE is AD21 */
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
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#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
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#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
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#endif
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/* Ethernet */
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#define CONFIG_DRIVER_DM9000
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#define CONFIG_DM9000_BASE 0x30000000
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#define DM9000_IO CONFIG_DM9000_BASE
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#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
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#define CONFIG_DM9000_USE_16BIT
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#define CONFIG_DM9000_NO_SROM
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_RESET_PHY_R
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/* USB */
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
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#ifdef CONFIG_AT91SAM9G10EK
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
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#else
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
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#endif
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x23e00000
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#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_ENV_SECT_SIZE 0x210
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#define CONFIG_ENV_SPI_MAX_HZ 15000000
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#define CONFIG_BOOTCOMMAND "sf probe 0; " \
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"sf read 0x22000000 0x84000 0x294000; " \
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"bootm 0x22000000"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock0 " \
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"mtdparts=atmel_nand:-(root) " \
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"rw rootfstype=jffs2"
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#elif CONFIG_SYS_USE_DATAFLASH_CS3
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/* bootstrap + u-boot + env + linux in dataflash on CS3 */
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#define CONFIG_ENV_OFFSET 0x4200
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#define CONFIG_ENV_SIZE 0x4200
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#define CONFIG_ENV_SECT_SIZE 0x210
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#define CONFIG_ENV_SPI_MAX_HZ 15000000
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#define CONFIG_BOOTCOMMAND "sf probe 0:3; " \
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"sf read 0x22000000 0x84000 0x294000; " \
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"bootm 0x22000000"
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#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
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"root=/dev/mtdblock0 " \
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"mtdparts=atmel_nand:-(root) " \
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"rw rootfstype=jffs2"
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#else /* CONFIG_SYS_USE_NANDFLASH */
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/* bootstrap + u-boot + env + linux in nandflash */
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#define CONFIG_ENV_OFFSET 0x120000
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200 earlyprintk " \
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"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
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"256k(env),256k(env_redundant),256k(spare)," \
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"512k(dtb),6M(kernel)ro,-(rootfs) " \
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"root=/dev/mtdblock7 rw rootfstype=jffs2"
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#endif
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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#endif
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