mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-13 06:36:16 +09:00
36c2ee4ce5
Add clock driver for the RCar Gen3 R8A7795 and R8A7796 SoCs . This driver allows reading out the clock configuration set by previous boot stages and enabling and disabling clock using the MSTP registers. Setting clock is not supported thus far. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
25 lines
753 B
Makefile
25 lines
753 B
Makefile
#
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# Copyright (c) 2015 Google, Inc
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_CLK) += clk-uclass.o clk_fixed_rate.o
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_SANDBOX) += clk_sandbox.o
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obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
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obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
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obj-$(CONFIG_CLK_RENESAS) += renesas/
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obj-$(CONFIG_CLK_ZYNQ) += clk_zynq.o
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obj-$(CONFIG_CLK_ZYNQMP) += clk_zynqmp.o
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obj-y += tegra/
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obj-$(CONFIG_CLK_UNIPHIER) += uniphier/
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obj-$(CONFIG_CLK_EXYNOS) += exynos/
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obj-$(CONFIG_CLK_AT91) += at91/
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obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
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obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_STM32F7) += clk_stm32f7.o
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