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https://github.com/brain-hackers/u-boot-brain
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155fa9af95
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
252 lines
5.6 KiB
C
252 lines
5.6 KiB
C
/*
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* Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
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*
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* (C) Copyright 2009 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the MX51EVK Board
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <config_cmd_default.h>
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/*
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* High Level Board Configuration Options
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*/
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/* An i.MX51 CPU */
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#define CONFIG_MX51
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#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
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#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
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#include <asm/arch/imx-regs.h>
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SYS_TEXT_BASE 0x97800000
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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/*
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* Bootloader Components Configuration
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*/
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_IDE
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_DATE
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#undef CONFIG_CMD_IMLS
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/*
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* Environmental settings
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*/
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
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#define CONFIG_ENV_SIZE (4 * 1024)
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/*
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* ATAG setup
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*/
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_REVISION_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_OF_LIBFDT 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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/*
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* Hardware drivers
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_MXC_GPIO
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/*
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* SPI Interface
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*/
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#ifdef CONFIG_CMD_SPI
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#define CONFIG_HARD_SPI
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#define CONFIG_MXC_SPI
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#define CONFIG_DEFAULT_SPI_BUS 1
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#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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/* SPI FLASH */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SST
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#define CONFIG_SF_DEFAULT_CS 1
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_MAX_HZ 25000000
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#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
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#define CONFIG_FSL_ENV_IN_SF
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_SYS_NO_FLASH
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#else
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#define CONFIG_ENV_IS_NOWHERE
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#endif
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/* SPI PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_SPI
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#define CONFIG_POWER_FSL
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#define CONFIG_FSL_PMIC_BUS 0
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#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
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#define CONFIG_FSL_PMIC_CLK 25000000
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#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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#define CONFIG_FSL_PMIC_BITLEN 32
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#define CONFIG_RTC_MC13XXX
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#endif
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/*
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* MMC Configs
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*/
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#ifdef CONFIG_CMD_MMC
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_ESDHC_NUM 2
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#endif
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/*
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* ATA/IDE
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*/
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#ifdef CONFIG_CMD_IDE
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#define CONFIG_LBA48
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#undef CONFIG_IDE_LED
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#undef CONFIG_IDE_RESET
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#define CONFIG_MX51_PATA
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#define __io
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#define CONFIG_SYS_IDE_MAXBUS 1
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#define CONFIG_SYS_IDE_MAXDEVICE 1
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#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
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#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
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#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
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#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
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#define CONFIG_SYS_ATA_STRIDE 4
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#define CONFIG_IDE_PREINIT
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#define CONFIG_MXC_ATA_PIO_MODE 4
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#endif
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/*
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* USB
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*/
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI /* Enable EHCI USB support */
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#define CONFIG_USB_EHCI_MX5
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#define CONFIG_USB_ULPI
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#define CONFIG_USB_ULPI_VIEWPORT
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#define CONFIG_MXC_USB_PORT 1
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#if (CONFIG_MXC_USB_PORT == 0)
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#define CONFIG_MXC_USB_PORTSC (1 << 28)
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#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
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#else
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#define CONFIG_MXC_USB_PORTSC (2 << 30)
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#define CONFIG_MXC_USB_FLAGS 0
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#endif
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_KEYBOARD
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
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#define CONFIG_PREBOOT
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/* USB NET */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#endif
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#endif /* CONFIG_CMD_USB */
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/*
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* Filesystems
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*/
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#ifdef CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#ifdef CONFIG_CMD_NET
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#define CONFIG_CMD_NFS
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#endif
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x90800000
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "Efika> "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
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#define CONFIG_SYS_MEMTEST_START 0x90000000
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#define CONFIG_SYS_MEMTEST_END 0x90010000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_DDR_CLKSEL 0
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#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
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#define CONFIG_SYS_MAIN_PWR_ON
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#endif
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