u-boot-brain/board/altera
Marek Vasut 40e7bcdee7 arm: socfpga: cache: Enable D-Cache
The code is now fixed to the point where we can safely enable
the L1 data cache. Enable the D-Cache and set it as write-alloc.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2014-10-06 17:46:50 +02:00
..
common nios2: remove epled driver 2014-08-30 17:48:43 +08:00
nios2-generic kconfig: remove redundant "string" type in arch and board Kconfigs 2014-09-13 16:43:55 -04:00
socfpga arm: socfpga: cache: Enable D-Cache 2014-10-06 17:46:50 +02:00