mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-15 01:03:24 +09:00
60c7c30aa0
This introduces OMAP3 support for the common omap boot code, as well as a major cleanup of the common omap boot code. First, the omap_boot_parameters structure becomes platform-specific, since its definition differs a bit across omap platforms. The offsets are removed as well since it is U-Boot's coding style to use structures for mapping such kind of data (in the sense that it is similar to registers). It is correct to assume that romcode structure encoding is the same as U-Boot, given the description of these structures in the TRMs. The original address provided by the bootrom is passed to the U-Boot binary instead of a duplicate of the structure stored in global data. This allows to have only the relevant (boot device and mode) information stored in global data. It is also expected that the address where the bootrom stores that information is not overridden by the U-Boot SPL or U-Boot. The save_omap_boot_params is expected to handle all special cases where the data provided by the bootrom cannot be used as-is, so that spl_boot_device and spl_boot_mode only return the data from global data. All of this is only relevant when the U-Boot SPL is used. In cases it is not, save_boot_params should fallback to its weak (or board-specific) definition. save_omap_boot_params should not be called in that context either. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
81 lines
1.8 KiB
C
81 lines
1.8 KiB
C
/*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <linux/mtd/omap_gpmc.h>
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#include <asm/omap_common.h>
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typedef struct {
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u32 mtype;
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char *board_string;
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char *nand_string;
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} omap3_sysinfo;
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struct emu_hal_params {
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u32 num_params;
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u32 param1;
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};
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/* Board SDRC timing values */
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struct board_sdrc_timings {
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u32 sharing;
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u32 mcfg;
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u32 ctrla;
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u32 ctrlb;
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u32 rfr_ctrl;
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u32 mr;
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};
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void prcm_init(void);
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void per_clocks_enable(void);
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void ehci_clocks_enable(void);
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void memif_init(void);
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void sdrc_init(void);
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void do_sdrc_init(u32, u32);
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void get_board_mem_timings(struct board_sdrc_timings *timings);
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void identify_nand_chip(int *mfr, int *id);
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void emif4_init(void);
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void gpmc_init(void);
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void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
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u32 size);
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void watchdog_init(void);
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void set_muxconf_regs(void);
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u32 get_cpu_family(void);
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u32 get_cpu_rev(void);
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u32 get_sku_id(void);
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u32 get_sysboot_value(void);
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u32 is_gpmc_muxed(void);
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u32 get_gpmc0_type(void);
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u32 get_gpmc0_width(void);
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u32 is_running_in_sdram(void);
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u32 is_running_in_sram(void);
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u32 is_running_in_flash(void);
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u32 get_device_type(void);
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void secureworld_exit(void);
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void try_unlock_memory(void);
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u32 get_boot_type(void);
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void invalidate_dcache(u32);
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u32 wait_on_value(u32, u32, void *, u32);
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void cancel_out(u32 *num, u32 *den, u32 den_limit);
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void sdelay(unsigned long);
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void make_cs1_contiguous(void);
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void omap_nand_switch_ecc(uint32_t, uint32_t);
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void power_init_r(void);
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void dieid_num_r(void);
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void get_dieid(u32 *id);
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void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
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void omap3_set_aux_cr_secure(u32 acr);
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u32 warm_reset(void);
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void save_omap_boot_params(void);
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#endif
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