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466f0137e8
difference to previous board version: - M29W128GH flash from Numonyx - SDRAM ISSI IS45S16800 (Option A2 105°C) - rev5 uses RTC RV-3029-C2 - update cs0 and cs1 baseaddr and length depending on the detected flash size. - added Werner Pfister <Pfister_Werner@intercontrol.de> as maintainer for the digsy board variants - As the M29W128GH needs a special flash_cmd_reset() document that in the new file doc/README.cfi. - move "#endif /* CONFIG_CMD_IDE */" to the right place - remove LOWBOOT config option for digsy_mtc and digsy_mtc_rev5 boards - change doc/README.cfi as Stefan Roese suggested Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> cc: Wolfgang Denk <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Werner Pfister <Pfister_Werner@intercontrol.de> cc: Detlev Zundel <dzu@denx.de>
30 lines
965 B
Plaintext
30 lines
965 B
Plaintext
The common CFI driver provides this weak default implementation for
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flash_cmd_reset():
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void __flash_cmd_reset(flash_info_t *info)
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{
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/*
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* We do not yet know what kind of commandset to use, so we issue
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* the reset command in both Intel and AMD variants, in the hope
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* that AMD flash roms ignore the Intel command.
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*/
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flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
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flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
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}
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void flash_cmd_reset(flash_info_t *info)
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__attribute__((weak,alias("__flash_cmd_reset")));
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Some flash chips seems to have trouble with this reset sequence. In this case
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the board specific code can override this weak default version with a board
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specific function. For example the digsy_mtc board equipped with the M29W128GH
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from Numonyx needs this version to function properly:
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void flash_cmd_reset(flash_info_t *info)
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{
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flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
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}
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see also:
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http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html
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