mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
224 lines
3.8 KiB
ArmAsm
224 lines
3.8 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2002, 2007 Maciej W. Rozycki
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* Copyright (C) 2001, 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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#include <asm/asm-offsets.h>
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#define STATMASK 0x1f
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.set noreorder
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/*
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* Macros copied and adapted from Linux MIPS
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*/
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.macro SAVE_AT
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.set push
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.set noat
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LONG_S $1, PT_R1(sp)
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.set pop
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.endm
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.macro SAVE_TEMP
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#if __mips_isa_rev < 6
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mfhi v1
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#endif
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#ifdef CONFIG_32BIT
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LONG_S $8, PT_R8(sp)
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LONG_S $9, PT_R9(sp)
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#endif
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LONG_S $10, PT_R10(sp)
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LONG_S $11, PT_R11(sp)
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LONG_S $12, PT_R12(sp)
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#if __mips_isa_rev < 6
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LONG_S v1, PT_HI(sp)
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mflo v1
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#endif
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LONG_S $13, PT_R13(sp)
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LONG_S $14, PT_R14(sp)
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LONG_S $15, PT_R15(sp)
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LONG_S $24, PT_R24(sp)
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#if __mips_isa_rev < 6
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LONG_S v1, PT_LO(sp)
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#endif
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.endm
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.macro SAVE_STATIC
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LONG_S $16, PT_R16(sp)
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LONG_S $17, PT_R17(sp)
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LONG_S $18, PT_R18(sp)
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LONG_S $19, PT_R19(sp)
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LONG_S $20, PT_R20(sp)
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LONG_S $21, PT_R21(sp)
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LONG_S $22, PT_R22(sp)
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LONG_S $23, PT_R23(sp)
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LONG_S $30, PT_R30(sp)
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.endm
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.macro SAVE_SOME
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.set push
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.set noat
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PTR_SUBU k1, sp, PT_SIZE
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LONG_S sp, PT_R29(k1)
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move sp, k1
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LONG_S $3, PT_R3(sp)
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LONG_S $0, PT_R0(sp)
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mfc0 v1, CP0_STATUS
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LONG_S $2, PT_R2(sp)
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LONG_S v1, PT_STATUS(sp)
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LONG_S $4, PT_R4(sp)
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mfc0 v1, CP0_CAUSE
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LONG_S $5, PT_R5(sp)
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LONG_S v1, PT_CAUSE(sp)
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LONG_S $6, PT_R6(sp)
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MFC0 v1, CP0_EPC
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LONG_S $7, PT_R7(sp)
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#ifdef CONFIG_64BIT
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LONG_S $8, PT_R8(sp)
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LONG_S $9, PT_R9(sp)
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#endif
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LONG_S v1, PT_EPC(sp)
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LONG_S $25, PT_R25(sp)
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LONG_S $28, PT_R28(sp)
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LONG_S $31, PT_R31(sp)
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.set pop
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.endm
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.macro RESTORE_AT
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.set push
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.set noat
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LONG_L $1, PT_R1(sp)
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.set pop
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.endm
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.macro RESTORE_TEMP
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#if __mips_isa_rev < 6
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LONG_L $24, PT_LO(sp)
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mtlo $24
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LONG_L $24, PT_HI(sp)
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mthi $24
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#endif
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#ifdef CONFIG_32BIT
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LONG_L $8, PT_R8(sp)
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LONG_L $9, PT_R9(sp)
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#endif
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LONG_L $10, PT_R10(sp)
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LONG_L $11, PT_R11(sp)
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LONG_L $12, PT_R12(sp)
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LONG_L $13, PT_R13(sp)
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LONG_L $14, PT_R14(sp)
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LONG_L $15, PT_R15(sp)
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LONG_L $24, PT_R24(sp)
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.endm
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.macro RESTORE_STATIC
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LONG_L $16, PT_R16(sp)
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LONG_L $17, PT_R17(sp)
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LONG_L $18, PT_R18(sp)
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LONG_L $19, PT_R19(sp)
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LONG_L $20, PT_R20(sp)
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LONG_L $21, PT_R21(sp)
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LONG_L $22, PT_R22(sp)
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LONG_L $23, PT_R23(sp)
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LONG_L $30, PT_R30(sp)
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.endm
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.macro RESTORE_SOME
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.set push
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.set reorder
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.set noat
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mfc0 a0, CP0_STATUS
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ori a0, STATMASK
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xori a0, STATMASK
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mtc0 a0, CP0_STATUS
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li v1, ST0_CU1 | ST0_FR | ST0_IM
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and a0, v1
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LONG_L v0, PT_STATUS(sp)
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nor v1, $0, v1
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and v0, v1
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or v0, a0
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mtc0 v0, CP0_STATUS
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LONG_L v1, PT_EPC(sp)
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MTC0 v1, CP0_EPC
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LONG_L $31, PT_R31(sp)
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LONG_L $28, PT_R28(sp)
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LONG_L $25, PT_R25(sp)
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#ifdef CONFIG_64BIT
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LONG_L $8, PT_R8(sp)
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LONG_L $9, PT_R9(sp)
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#endif
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LONG_L $7, PT_R7(sp)
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LONG_L $6, PT_R6(sp)
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LONG_L $5, PT_R5(sp)
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LONG_L $4, PT_R4(sp)
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LONG_L $3, PT_R3(sp)
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LONG_L $2, PT_R2(sp)
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.set pop
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.endm
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.macro RESTORE_SP
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LONG_L sp, PT_R29(sp)
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.endm
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NESTED(except_vec3_generic, 0, sp)
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PTR_LA k1, handle_reserved
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jr k1
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nop
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END(except_vec3_generic)
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NESTED(except_vec_ejtag_debug, 0, sp)
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PTR_LA k1, handle_ejtag_debug
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jr k1
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nop
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END(except_vec_ejtag_debug)
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NESTED(handle_reserved, PT_SIZE, sp)
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SAVE_SOME
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SAVE_AT
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SAVE_TEMP
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SAVE_STATIC
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PTR_LA t9, do_reserved
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jr t9
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move a0, sp
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END(handle_reserved)
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NESTED(handle_ejtag_debug, PT_SIZE, sp)
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.set push
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.set noat
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MTC0 k1, CP0_DESAVE
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/* Check for SDBBP */
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MFC0 k1, CP0_DEBUG
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sll k1, k1, 30
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bgez k1, ejtag_return
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nop
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SAVE_SOME
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SAVE_AT
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SAVE_TEMP
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SAVE_STATIC
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PTR_LA t9, do_ejtag_debug
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jalr t9
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move a0, sp
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RESTORE_TEMP
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RESTORE_STATIC
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RESTORE_AT
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RESTORE_SOME
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RESTORE_SP
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ejtag_return:
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MFC0 k1, CP0_DESAVE
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deret
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.set pop
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END(handle_ejtag_debug)
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