mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-03 08:43:45 +09:00
5ffa88eca7
For the powerpc processors with SRIO interface, boot location can be configured from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash for u-boot image. The image can be fetched from another processor's memory space by SRIO link connected between them. The processor boots from SRIO is slave, the processor boots from normal flash memory space and can help slave to boot from its memory space is master. They are different environments and requirements: master: 1. NOR flash for its own u-boot image, ucode and ENV space. 2. Slave's u-boot image in master NOR flash. 3. Normally boot from local NOR flash. 4. Configure SRIO switch system if needed. slave: 1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV. 2. Boot location should be set to SRIO1 or SRIO2 by RCW. 3. RCW should configure the SerDes, SRIO interfaces correctly. 4. Slave must be powered on after master's boot. For the master module, need to finish these processes: 1. Initialize the SRIO port and address space. 2. Set inbound SRIO windows covered slave's u-boot image stored in master's NOR flash. 3. Master's u-boot image should be generated specifically by make xxxx_SRIOBOOT_MASTER_config 4. Master must boot first, and then slave can be powered on. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
138 lines
4.6 KiB
C
138 lines
4.6 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_srio.h>
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#define SRIO_PORT_ACCEPT_ALL 0x10000001
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#define SRIO_IB_ATMU_AR 0x80f55000
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#if defined(CONFIG_FSL_CORENET)
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#define _DEVDISR_SRIO1 FSL_CORENET_DEVDISR_SRIO1
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#define _DEVDISR_SRIO2 FSL_CORENET_DEVDISR_SRIO2
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#define _DEVDISR_RMU FSL_CORENET_DEVDISR_RMU
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#define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
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#elif defined(CONFIG_MPC85xx)
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#define _DEVDISR_SRIO1 MPC85xx_DEVDISR_SRIO
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#define _DEVDISR_SRIO2 MPC85xx_DEVDISR_SRIO
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#define _DEVDISR_RMU MPC85xx_DEVDISR_RMSG
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#define CONFIG_SYS_MPC8xxx_GUTS_ADDR CONFIG_SYS_MPC85xx_GUTS_ADDR
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#elif defined(CONFIG_MPC86xx)
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#define _DEVDISR_SRIO1 MPC86xx_DEVDISR_SRIO
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#define _DEVDISR_SRIO2 MPC86xx_DEVDISR_SRIO
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#define _DEVDISR_RMU MPC86xx_DEVDISR_RMSG
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#define CONFIG_SYS_MPC8xxx_GUTS_ADDR \
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(&((immap_t *)CONFIG_SYS_IMMR)->im_gur)
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#else
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#error "No defines for DEVDISR_SRIO"
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#endif
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void srio_init(void)
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{
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC8xxx_GUTS_ADDR;
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int srio1_used = 0, srio2_used = 0;
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if (is_serdes_configured(SRIO1)) {
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set_next_law(CONFIG_SYS_SRIO1_MEM_PHYS,
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law_size_bits(CONFIG_SYS_SRIO1_MEM_SIZE),
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LAW_TRGT_IF_RIO_1);
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srio1_used = 1;
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printf("SRIO1: enabled\n");
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} else {
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printf("SRIO1: disabled\n");
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}
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#ifdef CONFIG_SRIO2
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if (is_serdes_configured(SRIO2)) {
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set_next_law(CONFIG_SYS_SRIO2_MEM_PHYS,
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law_size_bits(CONFIG_SYS_SRIO2_MEM_SIZE),
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LAW_TRGT_IF_RIO_2);
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srio2_used = 1;
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printf("SRIO2: enabled\n");
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} else {
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printf("SRIO2: disabled\n");
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}
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#endif
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#ifdef CONFIG_FSL_CORENET
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/* On FSL_CORENET devices we can disable individual ports */
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if (!srio1_used)
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setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO1);
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if (!srio2_used)
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setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_SRIO2);
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#endif
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/* neither port is used - disable everything */
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if (!srio1_used && !srio2_used) {
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setbits_be32(&gur->devdisr, _DEVDISR_SRIO1);
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setbits_be32(&gur->devdisr, _DEVDISR_SRIO2);
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setbits_be32(&gur->devdisr, _DEVDISR_RMU);
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}
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}
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#ifdef CONFIG_SRIOBOOT_MASTER
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void srio_boot_master(void)
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{
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struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
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/* set port accept-all */
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out_be32((void *)&srio->impl.port[CONFIG_SRIOBOOT_MASTER_PORT].ptaacr,
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SRIO_PORT_ACCEPT_ALL);
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debug("SRIOBOOT - MASTER: Master port [ %d ] for srio boot.\n",
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CONFIG_SRIOBOOT_MASTER_PORT);
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/* configure inbound window5 for slave's u-boot image */
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debug("SRIOBOOT - MASTER: Inbound window 5 for slave's image; "
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"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
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(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1,
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(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwtar,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS1 >> 12);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwbar,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS1 >> 12);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[0].riwar,
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SRIO_IB_ATMU_AR
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| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
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/* configure inbound window4 for slave's u-boot image */
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debug("SRIOBOOT - MASTER: Inbound window 4 for slave's image; "
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"Local = 0x%llx, Srio = 0x%llx, Size = 0x%x\n",
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(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2,
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(u64)CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwtar,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_LAW_PHYS2 >> 12);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwbar,
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CONFIG_SRIOBOOT_SLAVE_IMAGE_SRIO_PHYS2 >> 12);
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out_be32((void *)&srio->atmu
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.port[CONFIG_SRIOBOOT_MASTER_PORT].inbw[1].riwar,
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SRIO_IB_ATMU_AR
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| atmu_size_mask(CONFIG_SRIOBOOT_SLAVE_IMAGE_SIZE));
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}
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#endif
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