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6d9b82d085
LS1088A is compliant with the Layerscape Chassis Generation 3 with eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4 SDRAM memory controller with ECC, Data path acceleration architecture 2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs), QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
11 lines
214 B
Makefile
11 lines
214 B
Makefile
#
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# Copyright 2014 Freescale Semiconductor, Inc.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += ldpaa_wriop.o
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obj-y += ldpaa_eth.o
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obj-$(CONFIG_ARCH_LS2080A) += ls2080a.o
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obj-$(CONFIG_ARCH_LS1088A) += ls1088a.o
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