Michael Langer 5c23712dbd i.MX6 USDHC: Use the ESDHC clock ... The commit "i.mx: fsl_esdhc: add the i.mx6q support" (4692708d) introduces support for the i.MX6Q MMC host controller USDHC. MXC_IPG_PERCLK sets the clock to 66MHz. This seems to be the default clock of the ESDHC IP found in < i.MX6 silicon. However, the default clock for the USDHC IP found in i.MX6 is 200MHz (MXC_ESDHC_CLK). This difference will cause a 3 times higher clock on SD_CLK than expected (see fsl_esdh.c -> set_sysctl()). Signed-off-by: Michael Langer <michael.langer@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Jason Liu <r64343@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>		2012-07-07 14:07:29 +02:00
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cpu	i.MX6 USDHC: Use the ESDHC clock	2012-07-07 14:07:29 +02:00
dts	tegra: fdt: Add keyboard controller definition	2012-05-15 08:31:40 +02:00
include/asm	MX28: Fix a typo in mx28_reg_8 macro	2012-07-07 14:07:27 +02:00
lib	net: move bootfile init into eth_initialize	2012-05-15 17:32:33 -05:00
config.mk	Makefile: Add a 'checkthumb' rule	2012-05-15 08:31:26 +02:00