mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-02 00:03:45 +09:00
5e2ec773bb
The idea to generate our pages tables from an array of memory ranges is very sound. However, instead of hard coding the code to create up to 2 levels of 64k granule page tables, we really should just create normal 4k page tables that allow us to set caching attributes on 2M or 4k level later on. So this patch moves the full_va mapping code to 4k page size and makes it fully flexible to dynamically create as many levels as necessary for a map (including dynamic 1G/2M pages). It also adds support to dynamically split a large map into smaller ones when some code wants to set dcache attributes. With all this in place, there is very little reason to create your own page tables in board specific files. Signed-off-by: Alexander Graf <agraf@suse.de>
92 lines
1.9 KiB
C
92 lines
1.9 KiB
C
/*
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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/* Architecture-specific global data */
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struct arch_global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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#if defined(CONFIG_U_QE)
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u32 qe_clk;
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u32 brg_clk;
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uint mp_alloc_base;
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uint mp_alloc_top;
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#endif /* CONFIG_U_QE */
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#ifdef CONFIG_AT91FAMILY
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/* "static data" needed by at91's clock.c */
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unsigned long cpu_clk_rate_hz;
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unsigned long main_clk_rate_hz;
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unsigned long mck_rate_hz;
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unsigned long plla_rate_hz;
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unsigned long pllb_rate_hz;
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unsigned long at91_pllb_usb_init;
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#endif
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/* "static data" needed by most of timer.c on ARM platforms */
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unsigned long timer_rate_hz;
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unsigned long tbu;
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unsigned long tbl;
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unsigned long lastinc;
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unsigned long long timer_reset_value;
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#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
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unsigned long tlb_addr;
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unsigned long tlb_size;
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#if defined(CONFIG_SYS_FULL_VA)
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unsigned long tlb_fillptr;
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unsigned long tlb_emerg;
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#endif
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#endif
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#ifdef CONFIG_OMAP_COMMON
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u32 omap_boot_device;
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u32 omap_boot_mode;
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u8 omap_ch_flags;
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#endif
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#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
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unsigned long mem2_clk;
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#endif
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};
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#include <asm-generic/global_data.h>
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#ifdef __clang__
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#define DECLARE_GLOBAL_DATA_PTR
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#define gd get_gd()
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static inline gd_t *get_gd(void)
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{
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gd_t *gd_ptr;
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#ifdef CONFIG_ARM64
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/*
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* Make will already error that reserving x18 is not supported at the
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* time of writing, clang: error: unknown argument: '-ffixed-x18'
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*/
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__asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
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#else
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__asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
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#endif
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return gd_ptr;
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}
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#else
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#ifdef CONFIG_ARM64
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
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#else
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
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#endif
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#endif
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#endif /* __ASM_GBL_DATA_H */
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