mirror of
https://github.com/brain-hackers/u-boot-brain
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470 lines
12 KiB
C
470 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000, 2001
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*/
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/*
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* FPGA support
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*/
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#include <common.h>
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#include <command.h>
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#include <env.h>
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#include <fpga.h>
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#include <fs.h>
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#include <gzip.h>
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#include <image.h>
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#include <log.h>
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#include <malloc.h>
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static long do_fpga_get_device(char *arg)
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{
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long dev = FPGA_INVALID_DEVICE;
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char *devstr = env_get("fpga");
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if (devstr)
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/* Should be strtol to handle -1 cases */
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dev = simple_strtol(devstr, NULL, 16);
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if (dev == FPGA_INVALID_DEVICE && arg)
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dev = simple_strtol(arg, NULL, 16);
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debug("%s: device = %ld\n", __func__, dev);
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return dev;
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}
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static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
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struct cmd_tbl *cmdtp, int argc,
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char *const argv[])
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{
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size_t local_data_size;
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long local_fpga_data;
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debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
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if (argc != cmdtp->maxargs) {
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debug("fpga: incorrect parameters passed\n");
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return CMD_RET_USAGE;
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}
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*dev = do_fpga_get_device(argv[0]);
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local_fpga_data = simple_strtol(argv[1], NULL, 16);
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if (!local_fpga_data) {
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debug("fpga: zero fpga_data address\n");
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return CMD_RET_USAGE;
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}
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*fpga_data = local_fpga_data;
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local_data_size = simple_strtoul(argv[2], NULL, 16);
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if (!local_data_size) {
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debug("fpga: zero size\n");
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return CMD_RET_USAGE;
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}
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*data_size = local_data_size;
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return 0;
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}
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#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
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int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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struct fpga_secure_info fpga_sec_info;
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memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
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if (argc < 5) {
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debug("fpga: incorrect parameters passed\n");
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return CMD_RET_USAGE;
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}
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if (argc == 6)
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fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
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simple_strtoull(argv[5],
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NULL, 16);
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else
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/*
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* If 6th parameter is not passed then do_fpga_check_params
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* will get 5 instead of expected 6 which means that function
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* return CMD_RET_USAGE. Increase number of params +1 to pass
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* this.
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*/
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argc++;
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fpga_sec_info.encflag = (u8)simple_strtoul(argv[4], NULL, 16);
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fpga_sec_info.authflag = (u8)simple_strtoul(argv[3], NULL, 16);
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if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
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fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
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debug("fpga: Use <fpga load> for NonSecure bitstream\n");
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return CMD_RET_USAGE;
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}
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if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
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!fpga_sec_info.userkey_addr) {
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debug("fpga: User key not provided\n");
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return CMD_RET_USAGE;
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}
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
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}
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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fpga_fs_info fpga_fsinfo;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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fpga_fsinfo.fstype = FS_TYPE_ANY;
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fpga_fsinfo.blocksize = (unsigned int)simple_strtoul(argv[3], NULL, 16);
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fpga_fsinfo.interface = argv[4];
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fpga_fsinfo.dev_part = argv[5];
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fpga_fsinfo.filename = argv[6];
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return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
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}
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#endif
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static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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long dev = do_fpga_get_device(argv[0]);
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return fpga_info(dev);
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}
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static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_dump(dev, (void *)fpga_data, data_size);
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}
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static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
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}
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static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
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}
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#if defined(CONFIG_CMD_FPGA_LOADP)
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static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
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}
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADBP)
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static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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long fpga_data, dev;
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int ret;
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ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
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cmdtp, argc, argv);
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if (ret)
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return ret;
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return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
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BIT_PARTIAL);
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}
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADMK)
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static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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size_t data_size = 0;
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void *fpga_data = NULL;
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#if defined(CONFIG_FIT)
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const char *fit_uname = NULL;
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ulong fit_addr;
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#endif
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ulong dev = do_fpga_get_device(argv[0]);
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char *datastr = env_get("fpgadata");
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debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
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if (dev == FPGA_INVALID_DEVICE) {
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debug("fpga: Invalid fpga device\n");
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return CMD_RET_USAGE;
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}
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if (argc == 0 && !datastr) {
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debug("fpga: No datastr passed\n");
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return CMD_RET_USAGE;
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}
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if (argc == 2) {
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datastr = argv[1];
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debug("fpga: Full command with two args\n");
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} else if (argc == 1 && !datastr) {
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debug("fpga: Dev is setup - fpgadata passed\n");
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datastr = argv[0];
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}
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#if defined(CONFIG_FIT)
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if (fit_parse_subimage(datastr, (ulong)fpga_data,
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&fit_addr, &fit_uname)) {
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fpga_data = (void *)fit_addr;
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debug("* fpga: subimage '%s' from FIT image ",
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fit_uname);
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debug("at 0x%08lx\n", fit_addr);
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} else
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#endif
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{
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fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
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debug("* fpga: cmdline image address = 0x%08lx\n",
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(ulong)fpga_data);
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}
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debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
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if (!fpga_data) {
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puts("Zero fpga_data address\n");
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return CMD_RET_USAGE;
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}
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switch (genimg_get_format(fpga_data)) {
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#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
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case IMAGE_FORMAT_LEGACY:
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{
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image_header_t *hdr = (image_header_t *)fpga_data;
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ulong data;
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u8 comp;
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comp = image_get_comp(hdr);
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if (comp == IH_COMP_GZIP) {
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#if defined(CONFIG_GZIP)
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ulong image_buf = image_get_data(hdr);
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ulong image_size = ~0UL;
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data = image_get_load(hdr);
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if (gunzip((void *)data, ~0UL, (void *)image_buf,
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&image_size) != 0) {
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puts("GUNZIP: error\n");
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return CMD_RET_FAILURE;
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}
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data_size = image_size;
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#else
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puts("Gunzip image is not supported\n");
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return 1;
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#endif
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} else {
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data = (ulong)image_get_data(hdr);
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data_size = image_get_data_size(hdr);
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}
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return fpga_load(dev, (void *)data, data_size,
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BIT_FULL);
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}
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#endif
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#if defined(CONFIG_FIT)
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case IMAGE_FORMAT_FIT:
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{
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const void *fit_hdr = (const void *)fpga_data;
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int noffset;
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const void *fit_data;
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if (!fit_uname) {
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puts("No FIT subimage unit name\n");
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return CMD_RET_FAILURE;
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}
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if (!fit_check_format(fit_hdr)) {
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puts("Bad FIT image format\n");
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return CMD_RET_FAILURE;
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}
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/* get fpga component image node offset */
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noffset = fit_image_get_node(fit_hdr, fit_uname);
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if (noffset < 0) {
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printf("Can't find '%s' FIT subimage\n", fit_uname);
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return CMD_RET_FAILURE;
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}
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/* verify integrity */
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if (!fit_image_verify(fit_hdr, noffset)) {
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puts("Bad Data Hash\n");
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return CMD_RET_FAILURE;
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}
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/* get fpga subimage/external data address and length */
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if (fit_image_get_data_and_size(fit_hdr, noffset,
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&fit_data, &data_size)) {
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puts("Fpga subimage data not found\n");
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return CMD_RET_FAILURE;
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}
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return fpga_load(dev, fit_data, data_size, BIT_FULL);
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}
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#endif
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default:
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puts("** Unknown image type\n");
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return CMD_RET_FAILURE;
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}
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}
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#endif
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static struct cmd_tbl fpga_commands[] = {
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U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
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U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
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U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
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U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
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#if defined(CONFIG_CMD_FPGA_LOADP)
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U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADBP)
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U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADMK)
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U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
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#endif
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#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
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U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
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#endif
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};
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static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
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char *const argv[])
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{
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struct cmd_tbl *fpga_cmd;
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int ret;
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if (argc < 2)
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return CMD_RET_USAGE;
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fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
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ARRAY_SIZE(fpga_commands));
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if (!fpga_cmd) {
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debug("fpga: non existing command\n");
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return CMD_RET_USAGE;
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}
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argc -= 2;
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argv += 2;
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if (argc > fpga_cmd->maxargs) {
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debug("fpga: more parameters passed\n");
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return CMD_RET_USAGE;
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}
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ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
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return cmd_process_error(fpga_cmd, ret);
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}
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#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
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U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
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#else
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U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
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#endif
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"loadable FPGA image support",
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"[operation type] [device number] [image address] [image size]\n"
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"fpga operations:\n"
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" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
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" info\t[dev]\t\t\tlist known device information\n"
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" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
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#if defined(CONFIG_CMD_FPGA_LOADP)
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" loadp\t[dev] [address] [size]\t"
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"Load device from memory buffer with partial bitstream\n"
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#endif
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" loadb\t[dev] [address] [size]\t"
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"Load device from bitstream buffer (Xilinx only)\n"
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#if defined(CONFIG_CMD_FPGA_LOADBP)
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" loadbp\t[dev] [address] [size]\t"
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"Load device from bitstream buffer with partial bitstream"
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"(Xilinx only)\n"
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADFS)
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"Load device from filesystem (FAT by default) (Xilinx only)\n"
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" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
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" [<dev[:part]>] <filename>\n"
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#endif
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#if defined(CONFIG_CMD_FPGA_LOADMK)
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" loadmk [dev] [address]\tLoad device generated with mkimage"
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#if defined(CONFIG_FIT)
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"\n"
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"\tFor loadmk operating on FIT format uImage address must include\n"
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"\tsubimage unit name in the form of addr:<subimg_uname>"
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#endif
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#endif
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#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
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"Load encrypted bitstream (Xilinx only)\n"
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" loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
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" [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
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"Loads the secure bistreams(authenticated/encrypted/both\n"
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"authenticated and encrypted) of [size] from [address].\n"
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"The auth-OCM/DDR flag specifies to perform authentication\n"
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"in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
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"The enc flag specifies which key to be used for decryption\n"
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"0-device key, 1-user key, 2-no encryption.\n"
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"The optional Userkey address specifies from which address key\n"
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"has to be used for decryption if user key is selected.\n"
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"NOTE: the secure bitstream has to be created using Xilinx\n"
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"bootgen tool only.\n"
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#endif
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);
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