mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
67171e13a3
rockchip platform have a protocol to pass the the kernel reboot mode to bootloader by some special registers when system reboot. In bootloader we should read it and take action. We can only setup boot_mode in board_late_init becasue "setenv" need env setuped. So add CONFIG_BOARD_LATE_INIT to common header and use a entry "rk_board_late_init" to replace "board_late_init" in board file. Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
123 lines
2.2 KiB
C
123 lines
2.2 KiB
C
/*
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* (C) Copyright 2015 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <ram.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/grf_rk3036.h>
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#include <asm/arch/boot_mode.h>
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#include <asm/arch/sdram_rk3036.h>
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#include <asm/gpio.h>
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#include <dm/pinctrl.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define GRF_BASE 0x20008000
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static void setup_boot_mode(void)
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{
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struct rk3036_grf *const grf = (void *)GRF_BASE;
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int boot_mode = readl(&grf->os_reg[4]);
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debug("boot mode %x.\n", boot_mode);
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/* Clear boot mode */
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writel(BOOT_NORMAL, &grf->os_reg[4]);
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switch (boot_mode) {
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case BOOT_FASTBOOT:
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printf("enter fastboot!\n");
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setenv("preboot", "setenv preboot; fastboot usb0");
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break;
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case BOOT_UMS:
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printf("enter UMS!\n");
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setenv("preboot", "setenv preboot; ums mmc 0");
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break;
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}
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}
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__weak int rk_board_late_init(void)
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{
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return 0;
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}
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int board_late_init(void)
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{
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setup_boot_mode();
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return rk_board_late_init();
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}
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = sdram_size();
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return 0;
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}
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#ifndef CONFIG_SYS_DCACHE_OFF
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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static struct dwc2_plat_otg_data rk3036_otg_data = {
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.rx_fifo_sz = 512,
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.np_tx_fifo_sz = 16,
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.tx_fifo_sz = 128,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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int node;
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const char *mode;
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bool matched = false;
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const void *blob = gd->fdt_blob;
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/* find the usb_otg node */
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node = fdt_node_offset_by_compatible(blob, -1,
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"rockchip,rk3288-usb");
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while (node > 0) {
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mode = fdt_getprop(blob, node, "dr_mode", NULL);
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if (mode && strcmp(mode, "otg") == 0) {
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matched = true;
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break;
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}
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node = fdt_node_offset_by_compatible(blob, node,
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"rockchip,rk3288-usb");
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}
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if (!matched) {
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debug("Not found usb_otg device\n");
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return -ENODEV;
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}
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rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
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return dwc2_udc_probe(&rk3036_otg_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif
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