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https://github.com/brain-hackers/u-boot-brain
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3fd7f365e1
This adds the base addresses of i.MX23 and easy the detection of wrong order in board setup, in case no SoC has been set, an error is raised during build. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
135 lines
4.4 KiB
C
135 lines
4.4 KiB
C
/*
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* Freescale i.MX23/i.MX28 Peripheral Base Addresses
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* Based on code from LTIB:
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* Copyright (C) 2008 Embedded Alley Solutions Inc.
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*
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* (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __MXS_REGS_BASE_H__
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#define __MXS_REGS_BASE_H__
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/*
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* Register base addresses for i.MX23
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*/
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#if defined(CONFIG_MX23)
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#define MXS_ICOLL_BASE 0x80000000
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#define MXS_APBH_BASE 0x80004000
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#define MXS_ECC8_BASE 0x80008000
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#define MXS_BCH_BASE 0x8000A000
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#define MXS_GPMI_BASE 0x8000C000
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#define MXS_SSP0_BASE 0x80010000
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#define MXS_SSP1_BASE 0x80034000
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#define MXS_ETM_BASE 0x80014000
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#define MXS_PINCTRL_BASE 0x80018000
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#define MXS_DIGCTL_BASE 0x8001C000
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#define MXS_EMI_BASE 0x80020000
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#define MXS_APBX_BASE 0x80024000
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#define MXS_DCP_BASE 0x80028000
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#define MXS_PXP_BASE 0x8002A000
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#define MXS_OCOTP_BASE 0x8002C000
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#define MXS_AXI_BASE 0x8002E000
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#define MXS_LCDIF_BASE 0x80030000
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#define MXS_SSP1_BASE 0x80034000
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#define MXS_TVENC_BASE 0x80038000
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#define MXS_CLKCTRL_BASE 0x80040000
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#define MXS_SAIF0_BASE 0x80042000
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#define MXS_POWER_BASE 0x80044000
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#define MXS_SAIF1_BASE 0x80046000
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#define MXS_AUDIOOUT_BASE 0x80048000
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#define MXS_AUDIOIN_BASE 0x8004C000
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#define MXS_LRADC_BASE 0x80050000
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#define MXS_SPDIF_BASE 0x80054000
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#define MXS_I2C0_BASE 0x80058000
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#define MXS_RTC_BASE 0x8005C000
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#define MXS_PWM_BASE 0x80064000
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#define MXS_TIMROT_BASE 0x80068000
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#define MXS_UARTAPP0_BASE 0x8006C000
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#define MXS_UARTAPP1_BASE 0x8006E000
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#define MXS_UARTDBG_BASE 0x80070000
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#define MXS_USBPHY0_BASE 0x8007C000
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#define MXS_USBCTRL0_BASE 0x80080000
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#define MXS_DRAM_BASE 0x800E0000
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/*
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* Register base addresses for i.MX28
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*/
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#elif defined(CONFIG_MX28)
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#define MXS_ICOL_BASE 0x80000000
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#define MXS_HSADC_BASE 0x80002000
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#define MXS_APBH_BASE 0x80004000
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#define MXS_PERFMON_BASE 0x80006000
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#define MXS_BCH_BASE 0x8000A000
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#define MXS_GPMI_BASE 0x8000C000
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#define MXS_SSP0_BASE 0x80010000
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#define MXS_SSP1_BASE 0x80012000
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#define MXS_SSP2_BASE 0x80014000
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#define MXS_SSP3_BASE 0x80016000
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#define MXS_PINCTRL_BASE 0x80018000
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#define MXS_DIGCTL_BASE 0x8001C000
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#define MXS_ETM_BASE 0x80022000
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#define MXS_APBX_BASE 0x80024000
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#define MXS_DCP_BASE 0x80028000
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#define MXS_PXP_BASE 0x8002A000
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#define MXS_OCOTP_BASE 0x8002C000
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#define MXS_AXI_AHB0_BASE 0x8002E000
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#define MXS_LCDIF_BASE 0x80030000
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#define MXS_CAN0_BASE 0x80032000
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#define MXS_CAN1_BASE 0x80034000
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#define MXS_SIMDBG_BASE 0x8003C000
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#define MXS_SIMGPMISEL_BASE 0x8003C200
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#define MXS_SIMSSPSEL_BASE 0x8003C300
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#define MXS_SIMMEMSEL_BASE 0x8003C400
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#define MXS_GPIOMON_BASE 0x8003C500
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#define MXS_SIMENET_BASE 0x8003C700
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#define MXS_ARMJTAG_BASE 0x8003C800
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#define MXS_CLKCTRL_BASE 0x80040000
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#define MXS_SAIF0_BASE 0x80042000
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#define MXS_POWER_BASE 0x80044000
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#define MXS_SAIF1_BASE 0x80046000
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#define MXS_LRADC_BASE 0x80050000
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#define MXS_SPDIF_BASE 0x80054000
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#define MXS_RTC_BASE 0x80056000
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#define MXS_I2C0_BASE 0x80058000
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#define MXS_I2C1_BASE 0x8005A000
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#define MXS_PWM_BASE 0x80064000
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#define MXS_TIMROT_BASE 0x80068000
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#define MXS_UARTAPP0_BASE 0x8006A000
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#define MXS_UARTAPP1_BASE 0x8006C000
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#define MXS_UARTAPP2_BASE 0x8006E000
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#define MXS_UARTAPP3_BASE 0x80070000
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#define MXS_UARTAPP4_BASE 0x80072000
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#define MXS_UARTDBG_BASE 0x80074000
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#define MXS_USBPHY0_BASE 0x8007C000
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#define MXS_USBPHY1_BASE 0x8007E000
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#define MXS_USBCTRL0_BASE 0x80080000
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#define MXS_USBCTRL1_BASE 0x80090000
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#define MXS_DFLPT_BASE 0x800C0000
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#define MXS_DRAM_BASE 0x800E0000
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#define MXS_ENET0_BASE 0x800F0000
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#define MXS_ENET1_BASE 0x800F4000
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#else
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#error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
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#endif
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#endif /* __MXS_REGS_BASE_H__ */
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