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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-24 03:49:43 +09:00
53bdae2418
This driver supports the pin and gpio controller found in the Ocelot and Luton SoCs. The driver was inspired from the pinctrl driver in Linux, but was simplified and was modified to allow supporting an other SoCs (Luton). For Ocelot and Luton the controller is the same, only the pins to program differ. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
52 lines
1.1 KiB
C
52 lines
1.1 KiB
C
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Microsemi SoCs pinctrl driver
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*
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* Author: <alexandre.belloni@free-electrons.com>
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#define MSCC_FUNC_PER_PIN 4
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struct mscc_pin_caps {
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unsigned int pin;
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unsigned char functions[MSCC_FUNC_PER_PIN];
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};
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struct mscc_pin_data {
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const char *name;
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struct mscc_pin_caps *drv_data;
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};
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#define MSCC_P(p, f0, f1, f2) \
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static struct mscc_pin_caps mscc_pin_##p = { \
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.pin = p, \
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.functions = { \
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FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \
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}, \
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}
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struct mscc_pmx_func {
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const char **groups;
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unsigned int ngroups;
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};
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struct mscc_pinctrl {
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struct udevice *dev;
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struct pinctrl_dev *pctl;
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void __iomem *regs;
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struct mscc_pmx_func *func;
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int num_func;
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const struct mscc_pin_data *mscc_pins;
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int num_pins;
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char * const *function_names;
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};
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int mscc_pinctrl_probe(struct udevice *dev, int num_func,
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const struct mscc_pin_data *mscc_pins, int num_pins,
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char * const *function_names);
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const struct pinctrl_ops mscc_pinctrl_ops;
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const struct dm_gpio_ops mscc_gpio_ops;
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