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https://github.com/brain-hackers/u-boot-brain
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![Andrew F. Davis](/assets/img/avatar_default.png)
CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it encounters RAW images, express this same functionality as a positive option enabling support for RAW images: CONFIG_SPL_RAW_IMAGE_SUPPORT Also move uses of this to defconfigs. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Rework Kconfig logic a little, move to common/spl/Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
54 lines
1.4 KiB
C
54 lines
1.4 KiB
C
/*
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* Copyright (C) 2016 Marek Vasut <marex@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_TERASIC_DE1_SOC_H__
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#define __CONFIG_TERASIC_DE1_SOC_H__
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#include <asm/arch/base_addr_ac5.h>
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/* U-Boot Commands */
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#define CONFIG_FAT_WRITE
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#define CONFIG_HW_WATCHDOG
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/* Memory configurations */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
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/* Booting Linux */
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#define CONFIG_BOOTFILE "fitImage"
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#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
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#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Ethernet on SoC (EMAC) */
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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#endif
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#define CONFIG_ENV_IS_IN_MMC
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/* Extra Environment */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
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"bootm ${loadaddr} - ${fdtaddr}\0" \
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"bootimage=zImage\0" \
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"fdtaddr=100\0" \
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"fdtimage=socfpga.dtb\0" \
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"bootm ${loadaddr} - ${fdtaddr}\0" \
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"mmcroot=/dev/mmcblk0p2\0" \
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"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
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" root=${mmcroot} rw rootwait;" \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"mmcload=mmc rescan;" \
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"load mmc 0:1 ${loadaddr} ${bootimage};" \
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"load mmc 0:1 ${fdtaddr} ${fdtimage}\0" \
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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#endif /* __CONFIG_TERASIC_DE1_SOC_H__ */
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