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![Harini Katakam](/assets/img/avatar_default.png)
Add MSCC header with delay definitions for VSC8531 and associated family devices. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
41 lines
1.2 KiB
C
41 lines
1.2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Device Tree constants for Microsemi VSC8531 PHY
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*
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* Author: Nagaraju Lakkaraju
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*
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#ifndef _DT_BINDINGS_MSCC_VSC8531_H
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#define _DT_BINDINGS_MSCC_VSC8531_H
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/* PHY LED Modes */
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#define VSC8531_LINK_ACTIVITY 0
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#define VSC8531_LINK_1000_ACTIVITY 1
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#define VSC8531_LINK_100_ACTIVITY 2
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#define VSC8531_LINK_10_ACTIVITY 3
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#define VSC8531_LINK_100_1000_ACTIVITY 4
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#define VSC8531_LINK_10_1000_ACTIVITY 5
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#define VSC8531_LINK_10_100_ACTIVITY 6
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#define VSC8584_LINK_100FX_1000X_ACTIVITY 7
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#define VSC8531_DUPLEX_COLLISION 8
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#define VSC8531_COLLISION 9
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#define VSC8531_ACTIVITY 10
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#define VSC8584_100FX_1000X_ACTIVITY 11
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#define VSC8531_AUTONEG_FAULT 12
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#define VSC8531_SERIAL_MODE 13
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#define VSC8531_FORCE_LED_OFF 14
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#define VSC8531_FORCE_LED_ON 15
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#define VSC8531_RGMII_CLK_DELAY_0_2_NS 0
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#define VSC8531_RGMII_CLK_DELAY_0_8_NS 1
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#define VSC8531_RGMII_CLK_DELAY_1_1_NS 2
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#define VSC8531_RGMII_CLK_DELAY_1_7_NS 3
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#define VSC8531_RGMII_CLK_DELAY_2_0_NS 4
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#define VSC8531_RGMII_CLK_DELAY_2_3_NS 5
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#define VSC8531_RGMII_CLK_DELAY_2_6_NS 6
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#define VSC8531_RGMII_CLK_DELAY_3_4_NS 7
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#endif
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