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https://github.com/brain-hackers/u-boot-brain
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![Vignesh Raghavendra](/assets/img/avatar_default.png)
On J7200 SoC OSPI and HypeFlash are muxed at HW level and only one of them can be used at any time. J7200 EVM has both HyperFlash and OSPI flash on board. There is a user switch (SW3.1) that can be toggled to select OSPI flash vs HyperFlash. Read the state of this switch via wkup_gpio0_6 line and fixup the DT nodes to select OSPI vs HyperFlash Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
430 lines
9.6 KiB
C
430 lines
9.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for J721E EVM
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*
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* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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*/
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#include <common.h>
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#include <env.h>
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#include <fdt_support.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <net.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <spl.h>
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#include <asm/arch/sys_proto.h>
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#include <dm.h>
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#include <dm/uclass-internal.h>
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#include "../common/board_detect.h"
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#define board_is_j721e_som() (board_ti_k3_is("J721EX-PM1-SOM") || \
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board_ti_k3_is("J721EX-PM2-SOM"))
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#define board_is_j7200_som() board_ti_k3_is("J7200X-PM1-SOM")
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/* Max number of MAC addresses that are parsed/processed per daughter card */
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#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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#ifdef CONFIG_PHYS_64BIT
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gd->ram_size = 0x100000000;
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#else
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gd->ram_size = 0x80000000;
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#endif
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return 0;
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}
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ulong board_get_usable_ram_top(ulong total_size)
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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if (gd->ram_top > 0x100000000)
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return 0x100000000;
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#endif
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return gd->ram_top;
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}
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int dram_init_banksize(void)
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{
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/* Bank 0 declares the memory available in the DDR low region */
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = 0x80000000;
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gd->ram_size = 0x80000000;
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#ifdef CONFIG_PHYS_64BIT
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/* Bank 1 declares the memory available in the DDR high region */
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gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
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gd->bd->bi_dram[1].size = 0x80000000;
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gd->ram_size = 0x100000000;
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#endif
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return 0;
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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if (!strcmp(name, "k3-j721e-common-proc-board"))
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return 0;
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return -1;
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}
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#endif
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#if CONFIG_IS_ENABLED(DM_GPIO) && CONFIG_IS_ENABLED(OF_LIBFDT)
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/* Returns 1, if onboard mux is set to hyperflash */
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static void __maybe_unused detect_enable_hyperflash(void *blob)
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{
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struct gpio_desc desc = {0};
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if (dm_gpio_lookup_name("6", &desc))
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return;
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if (dm_gpio_request(&desc, "6"))
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return;
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if (dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN))
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return;
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if (dm_gpio_get_value(&desc)) {
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int offset;
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do_fixup_by_compat(blob, "ti,am654-hbmc", "status",
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"okay", sizeof("okay"), 0);
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offset = fdt_node_offset_by_compatible(blob, -1,
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"ti,j721e-ospi");
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fdt_setprop(blob, offset, "status", "disabled",
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sizeof("disabled"));
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}
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}
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#endif
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TARGET_J7200_A72_EVM)
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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detect_enable_hyperflash(spl_image->fdt_addr);
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}
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#endif
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, struct bd_info *bd)
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{
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int ret;
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ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
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if (ret < 0)
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ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
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"sram@70000000");
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if (ret)
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printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
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detect_enable_hyperflash(blob);
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return ret;
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}
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#endif
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#ifdef CONFIG_TI_I2C_BOARD_DETECT
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int do_board_detect(void)
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{
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int ret;
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS);
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if (ret)
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pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
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CONFIG_EEPROM_CHIP_ADDRESS, ret);
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return ret;
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}
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int checkboard(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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if (do_board_detect())
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/* EEPROM not populated */
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printf("Board: %s rev %s\n", "J721EX-PM1-SOM", "E2");
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else
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printf("Board: %s rev %s\n", ep->name, ep->version);
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return 0;
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}
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static void setup_board_eeprom_env(void)
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{
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char *name = "j721e";
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if (do_board_detect())
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goto invalid_eeprom;
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if (board_is_j721e_som())
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name = "j721e";
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else if (board_is_j7200_som())
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name = "j7200";
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else
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printf("Unidentified board claims %s in eeprom header\n",
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board_ti_get_name());
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invalid_eeprom:
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set_board_info_env_am6(name);
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}
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static void setup_serial(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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unsigned long board_serial;
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char *endp;
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char serial_string[17] = { 0 };
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if (env_get("serial#"))
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return;
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board_serial = simple_strtoul(ep->serial, &endp, 16);
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if (*endp != '\0') {
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pr_err("Error: Can't set serial# to %s\n", ep->serial);
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return;
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}
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snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
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env_set("serial#", serial_string);
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}
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/*
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* Declaration of daughtercards to probe. Note that when adding more
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* cards they should be grouped by the 'i2c_addr' field to allow for a
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* more efficient probing process.
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*/
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static const struct {
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u8 i2c_addr; /* I2C address of card EEPROM */
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char *card_name; /* EEPROM-programmed card name */
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char *dtbo_name; /* Device tree overlay to apply */
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u8 eth_offset; /* ethXaddr MAC address index offset */
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} ext_cards[] = {
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{
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0x51,
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"J7X-BASE-CPB",
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"", /* No dtbo for this board */
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0,
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},
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{
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0x52,
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"J7X-INFOTAN-EXP",
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"", /* No dtbo for this board */
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0,
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},
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{
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0x52,
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"J7X-GESI-EXP",
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"", /* No dtbo for this board */
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5, /* Start populating from eth5addr */
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},
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{
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0x54,
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"J7X-VSC8514-ETH",
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"", /* No dtbo for this board */
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1, /* Start populating from eth1addr */
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},
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};
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static bool daughter_card_detect_flags[ARRAY_SIZE(ext_cards)];
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const char *board_fit_get_additionnal_images(int index, const char *type)
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{
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int i, j;
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if (strcmp(type, FIT_FDT_PROP))
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return NULL;
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j = 0;
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for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
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if (daughter_card_detect_flags[i]) {
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if (j == index) {
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/*
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* Return dtbo name only if populated,
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* otherwise stop parsing here.
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*/
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if (strlen(ext_cards[i].dtbo_name))
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return ext_cards[i].dtbo_name;
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else
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return NULL;
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};
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j++;
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}
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}
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return NULL;
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}
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static int probe_daughtercards(void)
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{
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char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
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bool eeprom_read_success;
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struct ti_am6_eeprom ep;
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u8 previous_i2c_addr;
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u8 mac_addr_cnt;
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int i;
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int ret;
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/* Mark previous I2C address variable as not populated */
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previous_i2c_addr = 0xff;
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/* No EEPROM data was read yet */
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eeprom_read_success = false;
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/* Iterate through list of daughtercards */
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for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
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/* Obtain card-specific I2C address */
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u8 i2c_addr = ext_cards[i].i2c_addr;
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/* Read card EEPROM if not already read previously */
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if (i2c_addr != previous_i2c_addr) {
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/* Store I2C address so we can avoid reading twice */
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previous_i2c_addr = i2c_addr;
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/* Get and parse the daughter card EEPROM record */
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ret = ti_i2c_eeprom_am6_get(CONFIG_EEPROM_BUS_ADDRESS,
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i2c_addr,
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&ep,
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(char **)mac_addr,
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DAUGHTER_CARD_NO_OF_MAC_ADDR,
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&mac_addr_cnt);
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if (ret) {
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debug("%s: No daughtercard EEPROM at 0x%02x found %d\n",
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__func__, i2c_addr, ret);
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eeprom_read_success = false;
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/* Skip to the next daughtercard to probe */
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continue;
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}
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/* EEPROM read successful, okay to further process. */
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eeprom_read_success = true;
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}
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/* Only continue processing if EEPROM data was read */
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if (!eeprom_read_success)
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continue;
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/* Only process the parsed data if we found a match */
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if (strncmp(ep.name, ext_cards[i].card_name, sizeof(ep.name)))
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continue;
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printf("Detected: %s rev %s\n", ep.name, ep.version);
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daughter_card_detect_flags[i] = true;
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#ifndef CONFIG_SPL_BUILD
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int j;
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/*
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* Populate any MAC addresses from daughtercard into the U-Boot
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* environment, starting with a card-specific offset so we can
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* have multiple ext_cards contribute to the MAC pool in a well-
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* defined manner.
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*/
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for (j = 0; j < mac_addr_cnt; j++) {
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if (!is_valid_ethaddr((u8 *)mac_addr[j]))
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continue;
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eth_env_set_enetaddr_by_index("eth",
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ext_cards[i].eth_offset + j,
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(uchar *)mac_addr[j]);
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}
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#endif
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}
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#ifndef CONFIG_SPL_BUILD
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char name_overlays[1024] = { 0 };
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for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
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if (!daughter_card_detect_flags[i])
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continue;
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/* Skip if no overlays are to be added */
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if (!strlen(ext_cards[i].dtbo_name))
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continue;
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/*
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* Make sure we are not running out of buffer space by checking
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* if we can fit the new overlay, a trailing space to be used
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* as a separator, plus the terminating zero.
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*/
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if (strlen(name_overlays) + strlen(ext_cards[i].dtbo_name) + 2 >
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sizeof(name_overlays))
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return -ENOMEM;
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/* Append to our list of overlays */
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strcat(name_overlays, ext_cards[i].dtbo_name);
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strcat(name_overlays, " ");
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}
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/* Apply device tree overlay(s) to the U-Boot environment, if any */
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if (strlen(name_overlays))
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return env_set("name_overlays", name_overlays);
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#endif
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return 0;
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}
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#endif
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int board_late_init(void)
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{
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if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
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setup_board_eeprom_env();
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setup_serial();
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/* Check for and probe any plugged-in daughtercards */
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probe_daughtercards();
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}
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return 0;
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}
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void spl_board_init(void)
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{
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#if defined(CONFIG_ESM_K3) || defined(CONFIG_ESM_PMIC)
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struct udevice *dev;
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int ret;
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#endif
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if ((IS_ENABLED(CONFIG_TARGET_J721E_A72_EVM) ||
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IS_ENABLED(CONFIG_TARGET_J7200_A72_EVM)) &&
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IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
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probe_daughtercards();
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#ifdef CONFIG_ESM_K3
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if (board_ti_k3_is("J721EX-PM2-SOM")) {
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(k3_esm), &dev);
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if (ret)
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printf("ESM init failed: %d\n", ret);
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}
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#endif
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#ifdef CONFIG_ESM_PMIC
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if (board_ti_k3_is("J721EX-PM2-SOM")) {
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ret = uclass_get_device_by_driver(UCLASS_MISC,
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DM_GET_DRIVER(pmic_esm),
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&dev);
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if (ret)
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printf("ESM PMIC init failed: %d\n", ret);
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}
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#endif
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}
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