mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-02 09:30:43 +09:00
5a762e2509
Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> |
||
---|---|---|
.. | ||
arm_pl180_mmci.c | ||
arm_pl180_mmci.h | ||
atmel_mci.c | ||
atmel_mci.h | ||
bfin_sdh.c | ||
davinci_mmc.c | ||
fsl_esdhc.c | ||
ftsdc010_esdhc.c | ||
gen_atmel_mci.c | ||
Makefile | ||
mmc_spi.c | ||
mmc.c | ||
mv_sdhci.c | ||
mxcmmc.c | ||
omap_hsmmc.c | ||
pxa_mmc_gen.c | ||
pxa_mmc.c | ||
pxa_mmc.h | ||
s5p_mmc.c | ||
sdhci.c | ||
sh_mmcif.c | ||
sh_mmcif.h | ||
tegra2_mmc.c | ||
tegra2_mmc.h |