Haiying Wang b6bde93090 mpc8569mds: fix some ddr settings ... Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2010-10-07 09:49:47 -05:00
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bcsr.c	Update Freescale copyrights to remove "All Rights Reserved"	2009-07-29 09:59:22 +02:00
bcsr.h	mpc85xx: Configure QE USB for MPC8569E-MDS boards	2009-10-27 10:04:17 -05:00
config.mk	Create CPUDIR variable	2010-04-13 09:12:59 +02:00
ddr.c	mpc8569mds: fix some ddr settings	2010-10-07 09:49:47 -05:00
law.c	mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards	2009-10-27 09:44:37 -05:00
Makefile	MPC85xx: Add MPC8569MDS board support	2009-03-30 13:33:51 -05:00
mpc8569mds.c	mpc8569mds: fix consuming long time while relocating code.	2010-10-07 09:49:47 -05:00
tlb.c	mpc8569mds: fix consuming long time while relocating code.	2010-10-07 09:49:47 -05:00