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5906d2aa0c
On processor reset, the matrix write protection is disabled, so no need to disable/enable write protection when writing the matrix registers. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
/*
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* Copyright (C) 2015 Atmel Corporation
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* Wenyou Yang <wenyou.yang@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/sama5_matrix.h>
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void matrix_init(void)
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{
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struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
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struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
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int i;
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/* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
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for (i = 4; i <= 10; i++) {
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writel(0x000f0f0f, &h64mx->ssr[i]);
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writel(0x0000ffff, &h64mx->sassr[i]);
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writel(0x0000000f, &h64mx->srtsr[i]);
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}
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/* CS3 */
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writel(0x00c0c0c0, &h32mx->ssr[3]);
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writel(0xff000000, &h32mx->sassr[3]);
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writel(0xff000000, &h32mx->srtsr[3]);
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/* NFC SRAM */
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writel(0x00010101, &h32mx->ssr[4]);
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writel(0x00000001, &h32mx->sassr[4]);
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writel(0x00000001, &h32mx->srtsr[4]);
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/* Configure Programmable Security peripherals on matrix 64 */
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writel(readl(&h64mx->spselr[0]) | 0x00080000, &h64mx->spselr[0]);
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writel(readl(&h64mx->spselr[1]) | 0x00180000, &h64mx->spselr[1]);
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writel(readl(&h64mx->spselr[2]) | 0x00000008, &h64mx->spselr[2]);
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/* Configure Programmable Security peripherals on matrix 32 */
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writel(readl(&h32mx->spselr[0]) | 0xFFC00000, &h32mx->spselr[0]);
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writel(readl(&h32mx->spselr[1]) | 0x60E3FFFF, &h32mx->spselr[1]);
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}
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