mirror of
https://github.com/brain-hackers/u-boot-brain
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cc9429a556
Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long. By changing the type to u8, we can save over 600 Bytes from the SPL, so do it. This patch also constifies the array. Signed-off-by: Marek Vasut <marex@denx.de>
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/system_manager.h>
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#include <asm/arch/fpga_manager.h>
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DECLARE_GLOBAL_DATA_PTR;
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static struct socfpga_system_manager *sysmgr_regs =
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(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
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/*
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* Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
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* The value is not wrote to SYSMGR.FPGAINTF.MODULE but
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* CONFIG_SYSMGR_ISWGRP_HANDOFF.
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*/
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static void populate_sysmgr_fpgaintf_module(void)
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{
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uint32_t handoff_val = 0;
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/* ISWGRP_HANDOFF_FPGAINTF */
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writel(0, &sysmgr_regs->iswgrp_handoff[2]);
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/* Enable the signal for those HPS peripherals that use FPGA. */
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if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_NAND;
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if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC1;
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if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SDMMC;
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if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_EMAC0;
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if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM0;
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if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
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handoff_val |= SYSMGR_FPGAINTF_SPIM1;
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/* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
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based on pinmux setting */
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setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val);
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handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]);
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if (fpgamgr_test_fpga_ready()) {
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/* Enable the required signals only */
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writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module);
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}
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}
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/*
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* Configure all the pin muxes
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*/
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void sysmgr_pinmux_init(void)
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{
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uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0];
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const u8 *sys_mgr_init_table;
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unsigned int len;
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int i;
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sysmgr_get_pinmux_table(&sys_mgr_init_table, &len);
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for (i = 0; i < len; i++) {
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writel(sys_mgr_init_table[i], regs);
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regs += sizeof(regs);
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}
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populate_sysmgr_fpgaintf_module();
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}
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/*
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* This bit allows the bootrom to configure the IOs after a warm reset.
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*/
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void sysmgr_config_warmrstcfgio(int enable)
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{
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if (enable)
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setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
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SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
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else
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clrbits_le32(&sysmgr_regs->romcodegrp_ctrl,
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SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
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}
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