mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 03:36:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
104 lines
2.6 KiB
C
104 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2005-2008 Arthur Shipkowski (art@videon-central.com)
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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#include <common.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define PERIOD 13 /* system bus period in ns */
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#define SDRAM_TREFI 7800 /* in ns */
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int checkboard(void)
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{
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puts("Board: ");
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puts("Freescale MCF5275 EVB\n");
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return 0;
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};
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int dram_init(void)
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{
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sdramctrl_t *sdp = (sdramctrl_t *)(MMAP_SDRAM);
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gpio_t *gpio_reg = (gpio_t *)(MMAP_GPIO);
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/* Enable SDRAM */
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out_be16(&gpio_reg->par_sdram, 0x3FF);
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/* Set up chip select */
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out_be32(&sdp->sdbar0, CONFIG_SYS_SDRAM_BASE);
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out_be32(&sdp->sdbmr0, MCF_SDRAMC_SDMRn_BAM_32M | MCF_SDRAMC_SDMRn_V);
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/* Set up timing */
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out_be32(&sdp->sdcfg1, 0x83711630);
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out_be32(&sdp->sdcfg2, 0x46770000);
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/* Enable clock */
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out_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_MODE_EN | MCF_SDRAMC_SDCR_CKE);
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/* Set precharge */
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setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
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/* Dummy write to start SDRAM */
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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/* Send LEMR */
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setbits_be32(&sdp->sdmr,
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MCF_SDRAMC_SDMR_BNKAD_LEMR | MCF_SDRAMC_SDMR_AD(0x0) |
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MCF_SDRAMC_SDMR_CMD);
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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/* Send LMR */
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out_be32(&sdp->sdmr, 0x058d0000);
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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/* Stop sending commands */
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clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD);
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/* Set precharge */
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setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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/* Stop manual precharge, send 2 IREF */
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clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL);
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setbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IREF);
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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out_be32(&sdp->sdmr, 0x018d0000);
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*((volatile unsigned long *)CONFIG_SYS_SDRAM_BASE) = 0xa5a59696;
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/* Stop sending commands */
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clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD);
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clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_MODE_EN);
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/* Turn on auto refresh, lock SDMR */
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out_be32(&sdp->sdcr,
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MCF_SDRAMC_SDCR_CKE
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| MCF_SDRAMC_SDCR_REF
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| MCF_SDRAMC_SDCR_MUX(1)
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/* 1 added to round up */
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| MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1)
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| MCF_SDRAMC_SDCR_DQS_OE(0x3));
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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return 0;
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};
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int testdram(void)
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{
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/* TODO: XXX XXX XXX */
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printf("DRAM test not implemented!\n");
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return (0);
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}
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