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At present all BayTrail boards configure fsp,emmc-boot-mode to 2, which means "eMMC 4.1" per FSP documentation. However, eMMC 4.1 only shows up on some early stepping silicon of BayTrail SoC. Newer stepping SoC integrates an eMMC 4.5 controller. Intel FSP provides a config option fsp,emmc-boot-mode which tells FSP which eMMC controller it initializes. Instead of hardcoded to 2, now we change it to 1 which means "auto". With this change, MinnowMax board (with a D0 stepping BayTrail SoC) can see the eMMC 4.5 controller at PCI address 00.17.00 via U-Boot 'pci' command. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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| .. | ||
| include | ||
| microcode | ||
| .gitignore | ||
| bayleybay.dts | ||
| broadwell_som-6896.dts | ||
| chromebook_link.dts | ||
| chromebook_samus.dts | ||
| chromebox_panther.dts | ||
| conga-qeval20-qa3-e3845.dts | ||
| cougarcanyon2.dts | ||
| crownbay.dts | ||
| efi.dts | ||
| galileo.dts | ||
| keyboard.dtsi | ||
| Makefile | ||
| minnowmax.dts | ||
| qemu-x86_i440fx.dts | ||
| qemu-x86_q35.dts | ||
| rtc.dtsi | ||
| serial.dtsi | ||
| skeleton.dtsi | ||
| tsc_timer.dtsi | ||