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d60a2099a2
The QorIQ LS1 family is built on Layerscape architecture, the industry's first software-aware, core-agnostic networking architecture to offer unprecedented efficiency and scale. Freescale LS102xA is a set of SoCs combines two ARM Cortex-A7 cores that have been optimized for high reliability and pack the highest level of integration available for sub-3 W embedded communications processors with Layerscape architecture and with a comprehensive enablement model focused on ease of programmability. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Jason Jin <jason.jin@freescale.com> Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
24 lines
382 B
C
24 lines
382 B
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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*/
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#ifndef __ASM_ARCH_LS102XA_CLOCK_H_
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#define __ASM_ARCH_LS102XA_CLOCK_H_
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#include <common.h>
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_UART_CLK,
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MXC_ESDHC_CLK,
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MXC_I2C_CLK,
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MXC_DSPI_CLK,
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};
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unsigned int mxc_get_clock(enum mxc_clock clk);
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#endif /* __ASM_ARCH_LS102XA_CLOCK_H_ */
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