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![Jon Medhurst (Tixy)](/assets/img/avatar_default.png)
The new IO FPGA implementation for Versatile Express contains an MMCI (PL180) cell with the FIFO extended to 128 words. This causes the read_bytes() function to go into an infinite loop; as it will wait for for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8 words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal once there are fewer than 64 words left to transfer. One possible fix is to add some build time configuration to change SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic code only seems to exist as a small performance optimisation, so the solution implemented by this patch is to simply remove it. The error checking following the loop is also removed as this will be handled by code further down the function. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org>
418 lines
10 KiB
C
418 lines
10 KiB
C
/*
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* ARM PrimeCell MultiMedia Card Interface - PL180
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*
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* Copyright (C) ST-Ericsson SA 2010
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*
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* Author: Ulf Hansson <ulf.hansson@stericsson.com>
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* Author: Martin Lundholm <martin.xa.lundholm@stericsson.com>
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* Ported to drivers/mmc/ by: Matt Waddel <matt.waddel@linaro.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* #define DEBUG */
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#include <asm/io.h>
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#include "common.h"
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#include <errno.h>
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#include <mmc.h>
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#include "arm_pl180_mmci.h"
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#include <malloc.h>
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struct mmc_host {
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struct sdi_registers *base;
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};
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static int wait_for_command_end(struct mmc *dev, struct mmc_cmd *cmd)
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{
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u32 hoststatus, statusmask;
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struct mmc_host *host = dev->priv;
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statusmask = SDI_STA_CTIMEOUT | SDI_STA_CCRCFAIL;
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if ((cmd->resp_type & MMC_RSP_PRESENT))
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statusmask |= SDI_STA_CMDREND;
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else
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statusmask |= SDI_STA_CMDSENT;
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do
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hoststatus = readl(&host->base->status) & statusmask;
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while (!hoststatus);
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writel(statusmask, &host->base->status_clear);
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if (hoststatus & SDI_STA_CTIMEOUT) {
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printf("CMD%d time out\n", cmd->cmdidx);
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return -ETIMEDOUT;
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} else if ((hoststatus & SDI_STA_CCRCFAIL) &&
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(cmd->flags & MMC_RSP_CRC)) {
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printf("CMD%d CRC error\n", cmd->cmdidx);
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return -EILSEQ;
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}
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if (cmd->resp_type & MMC_RSP_PRESENT) {
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cmd->response[0] = readl(&host->base->response0);
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cmd->response[1] = readl(&host->base->response1);
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cmd->response[2] = readl(&host->base->response2);
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cmd->response[3] = readl(&host->base->response3);
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debug("CMD%d response[0]:0x%08X, response[1]:0x%08X, "
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"response[2]:0x%08X, response[3]:0x%08X\n",
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cmd->cmdidx, cmd->response[0], cmd->response[1],
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cmd->response[2], cmd->response[3]);
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}
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return 0;
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}
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/* send command to the mmc card and wait for results */
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static int do_command(struct mmc *dev, struct mmc_cmd *cmd)
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{
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int result;
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u32 sdi_cmd = 0;
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struct mmc_host *host = dev->priv;
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sdi_cmd = ((cmd->cmdidx & SDI_CMD_CMDINDEX_MASK) | SDI_CMD_CPSMEN);
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if (cmd->resp_type) {
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sdi_cmd |= SDI_CMD_WAITRESP;
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if (cmd->resp_type & MMC_RSP_136)
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sdi_cmd |= SDI_CMD_LONGRESP;
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}
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writel((u32)cmd->cmdarg, &host->base->argument);
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udelay(COMMAND_REG_DELAY);
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writel(sdi_cmd, &host->base->command);
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result = wait_for_command_end(dev, cmd);
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/* After CMD2 set RCA to a none zero value. */
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if ((result == 0) && (cmd->cmdidx == MMC_CMD_ALL_SEND_CID))
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dev->rca = 10;
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/* After CMD3 open drain is switched off and push pull is used. */
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if ((result == 0) && (cmd->cmdidx == MMC_CMD_SET_RELATIVE_ADDR)) {
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u32 sdi_pwr = readl(&host->base->power) & ~SDI_PWR_OPD;
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writel(sdi_pwr, &host->base->power);
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}
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return result;
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}
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static int read_bytes(struct mmc *dev, u32 *dest, u32 blkcount, u32 blksize)
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{
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u32 *tempbuff = dest;
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u64 xfercount = blkcount * blksize;
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struct mmc_host *host = dev->priv;
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u32 status, status_err;
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debug("read_bytes: blkcount=%u blksize=%u\n", blkcount, blksize);
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status = readl(&host->base->status);
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status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT |
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SDI_STA_RXOVERR);
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while ((!status_err) && (xfercount >= sizeof(u32))) {
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if (status & SDI_STA_RXDAVL) {
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*(tempbuff) = readl(&host->base->fifo);
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tempbuff++;
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xfercount -= sizeof(u32);
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}
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status = readl(&host->base->status);
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status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT |
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SDI_STA_RXOVERR);
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}
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status_err = status &
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(SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_DBCKEND |
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SDI_STA_RXOVERR);
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while (!status_err) {
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status = readl(&host->base->status);
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status_err = status &
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(SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_DBCKEND |
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SDI_STA_RXOVERR);
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}
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if (status & SDI_STA_DTIMEOUT) {
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printf("Read data timed out, xfercount: %llu, status: 0x%08X\n",
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xfercount, status);
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return -ETIMEDOUT;
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} else if (status & SDI_STA_DCRCFAIL) {
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printf("Read data bytes CRC error: 0x%x\n", status);
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return -EILSEQ;
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} else if (status & SDI_STA_RXOVERR) {
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printf("Read data RX overflow error\n");
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return -EIO;
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}
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writel(SDI_ICR_MASK, &host->base->status_clear);
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if (xfercount) {
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printf("Read data error, xfercount: %llu\n", xfercount);
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return -ENOBUFS;
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}
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return 0;
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}
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static int write_bytes(struct mmc *dev, u32 *src, u32 blkcount, u32 blksize)
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{
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u32 *tempbuff = src;
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int i;
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u64 xfercount = blkcount * blksize;
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struct mmc_host *host = dev->priv;
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u32 status, status_err;
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debug("write_bytes: blkcount=%u blksize=%u\n", blkcount, blksize);
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status = readl(&host->base->status);
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status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT);
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while (!status_err && xfercount) {
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if (status & SDI_STA_TXFIFOBW) {
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if (xfercount >= SDI_FIFO_BURST_SIZE * sizeof(u32)) {
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for (i = 0; i < SDI_FIFO_BURST_SIZE; i++)
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writel(*(tempbuff + i),
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&host->base->fifo);
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tempbuff += SDI_FIFO_BURST_SIZE;
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xfercount -= SDI_FIFO_BURST_SIZE * sizeof(u32);
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} else {
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while (xfercount >= sizeof(u32)) {
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writel(*(tempbuff), &host->base->fifo);
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tempbuff++;
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xfercount -= sizeof(u32);
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}
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}
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}
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status = readl(&host->base->status);
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status_err = status & (SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT);
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}
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status_err = status &
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(SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_DBCKEND);
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while (!status_err) {
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status = readl(&host->base->status);
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status_err = status &
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(SDI_STA_DCRCFAIL | SDI_STA_DTIMEOUT | SDI_STA_DBCKEND);
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}
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if (status & SDI_STA_DTIMEOUT) {
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printf("Write data timed out, xfercount:%llu,status:0x%08X\n",
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xfercount, status);
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return -ETIMEDOUT;
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} else if (status & SDI_STA_DCRCFAIL) {
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printf("Write data CRC error\n");
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return -EILSEQ;
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}
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writel(SDI_ICR_MASK, &host->base->status_clear);
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if (xfercount) {
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printf("Write data error, xfercount:%llu", xfercount);
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return -ENOBUFS;
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}
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return 0;
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}
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static int do_data_transfer(struct mmc *dev,
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struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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int error = -ETIMEDOUT;
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struct mmc_host *host = dev->priv;
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u32 blksz = 0;
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u32 data_ctrl = 0;
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u32 data_len = (u32) (data->blocks * data->blocksize);
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blksz = (ffs(data->blocksize) - 1);
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data_ctrl |= ((blksz << 4) & SDI_DCTRL_DBLKSIZE_MASK);
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data_ctrl |= SDI_DCTRL_DTEN;
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writel(SDI_DTIMER_DEFAULT, &host->base->datatimer);
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writel(data_len, &host->base->datalength);
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udelay(DATA_REG_DELAY);
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if (data->flags & MMC_DATA_READ) {
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data_ctrl |= SDI_DCTRL_DTDIR_IN;
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writel(data_ctrl, &host->base->datactrl);
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error = do_command(dev, cmd);
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if (error)
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return error;
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error = read_bytes(dev, (u32 *)data->dest, (u32)data->blocks,
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(u32)data->blocksize);
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} else if (data->flags & MMC_DATA_WRITE) {
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error = do_command(dev, cmd);
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if (error)
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return error;
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writel(data_ctrl, &host->base->datactrl);
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error = write_bytes(dev, (u32 *)data->src, (u32)data->blocks,
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(u32)data->blocksize);
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}
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return error;
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}
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static int host_request(struct mmc *dev,
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struct mmc_cmd *cmd,
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struct mmc_data *data)
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{
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int result;
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if (data)
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result = do_data_transfer(dev, cmd, data);
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else
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result = do_command(dev, cmd);
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return result;
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}
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/* MMC uses open drain drivers in the enumeration phase */
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static int mmc_host_reset(struct mmc *dev)
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{
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struct mmc_host *host = dev->priv;
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u32 sdi_u32 = SDI_PWR_OPD | SDI_PWR_PWRCTRL_ON;
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writel(sdi_u32, &host->base->power);
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return 0;
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}
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static void host_set_ios(struct mmc *dev)
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{
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struct mmc_host *host = dev->priv;
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u32 sdi_clkcr;
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sdi_clkcr = readl(&host->base->clock);
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/* Ramp up the clock rate */
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if (dev->clock) {
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u32 clkdiv = 0;
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if (dev->clock >= dev->f_max)
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dev->clock = dev->f_max;
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clkdiv = ((ARM_MCLK / dev->clock) / 2) - 1;
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if (clkdiv > SDI_CLKCR_CLKDIV_MASK)
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clkdiv = SDI_CLKCR_CLKDIV_MASK;
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sdi_clkcr &= ~(SDI_CLKCR_CLKDIV_MASK);
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sdi_clkcr |= clkdiv;
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}
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/* Set the bus width */
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if (dev->bus_width) {
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u32 buswidth = 0;
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switch (dev->bus_width) {
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case 1:
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buswidth |= SDI_CLKCR_WIDBUS_1;
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break;
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case 4:
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buswidth |= SDI_CLKCR_WIDBUS_4;
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break;
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default:
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printf("Invalid bus width\n");
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break;
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}
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sdi_clkcr &= ~(SDI_CLKCR_WIDBUS_MASK);
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sdi_clkcr |= buswidth;
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}
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writel(sdi_clkcr, &host->base->clock);
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udelay(CLK_CHANGE_DELAY);
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}
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struct mmc *alloc_mmc_struct(void)
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{
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struct mmc_host *host = NULL;
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struct mmc *mmc_device = NULL;
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host = malloc(sizeof(struct mmc_host));
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if (!host)
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return NULL;
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mmc_device = malloc(sizeof(struct mmc));
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if (!mmc_device)
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goto err;
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mmc_device->priv = host;
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return mmc_device;
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err:
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free(host);
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return NULL;
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}
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/*
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* mmc_host_init - initialize the mmc controller.
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* Set initial clock and power for mmc slot.
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* Initialize mmc struct and register with mmc framework.
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*/
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static int arm_pl180_mmci_host_init(struct mmc *dev)
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{
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struct mmc_host *host = dev->priv;
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u32 sdi_u32;
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host->base = (struct sdi_registers *)CONFIG_ARM_PL180_MMCI_BASE;
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/* Initially set power-on, full voltage & MMCI read */
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sdi_u32 = INIT_PWR;
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writel(sdi_u32, &host->base->power);
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/* setting clk freq 505KHz */
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sdi_u32 = SDI_CLKCR_CLKDIV_INIT | SDI_CLKCR_CLKEN;
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writel(sdi_u32, &host->base->clock);
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udelay(CLK_CHANGE_DELAY);
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/* Disable mmc interrupts */
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sdi_u32 = readl(&host->base->mask0) & ~SDI_MASK0_MASK;
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writel(sdi_u32, &host->base->mask0);
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sprintf(dev->name, "MMC");
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dev->clock = ARM_MCLK / (2 * (SDI_CLKCR_CLKDIV_INIT + 1));
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dev->send_cmd = host_request;
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dev->set_ios = host_set_ios;
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dev->init = mmc_host_reset;
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dev->host_caps = 0;
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dev->voltages = VOLTAGE_WINDOW_MMC;
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dev->f_min = dev->clock;
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dev->f_max = CONFIG_ARM_PL180_MMCI_CLOCK_FREQ;
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return 0;
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}
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int arm_pl180_mmci_init(void)
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{
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int error;
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struct mmc *dev;
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dev = alloc_mmc_struct();
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if (!dev)
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return -1;
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error = arm_pl180_mmci_host_init(dev);
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if (error) {
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printf("mmci_host_init error - %d\n", error);
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return -1;
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}
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dev->b_max = 0;
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mmc_register(dev);
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debug("registered mmc interface number is:%d\n", dev->block_dev.dev);
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return 0;
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}
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