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![Stephen Warren](/assets/img/avatar_default.png)
The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
243 lines
5.1 KiB
C
243 lines
5.1 KiB
C
/*
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* (C) Copyright 2009 SAMSUNG Electronics
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* Minkyu Kang <mk7.kang@samsung.com>
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* Heungjun Kim <riverful.kim@samsung.com>
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*
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* based on drivers/serial/s3c64xx.c
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <linux/compiler.h>
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#include <asm/io.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/uart.h>
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#include <serial.h>
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#include <clk.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define RX_FIFO_COUNT_SHIFT 0
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#define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
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#define RX_FIFO_FULL (1 << 8)
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#define TX_FIFO_COUNT_SHIFT 16
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#define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
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#define TX_FIFO_FULL (1 << 24)
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/* Information about a serial port */
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struct s5p_serial_platdata {
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struct s5p_uart *reg; /* address of registers in physical memory */
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u8 port_id; /* uart port number */
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};
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/*
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* The coefficient, used to calculate the baudrate on S5P UARTs is
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* calculated as
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* C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
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* however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
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* 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
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*/
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static const int udivslot[] = {
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0,
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0x0080,
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0x0808,
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0x0888,
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0x2222,
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0x4924,
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0x4a52,
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0x54aa,
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0x5555,
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0xd555,
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0xd5d5,
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0xddd5,
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0xdddd,
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0xdfdd,
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0xdfdf,
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0xffdf,
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};
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static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
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{
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/* enable FIFOs, auto clear Rx FIFO */
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writel(0x3, &uart->ufcon);
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writel(0, &uart->umcon);
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/* 8N1 */
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writel(0x3, &uart->ulcon);
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/* No interrupts, no DMA, pure polling */
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writel(0x245, &uart->ucon);
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}
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static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
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int baudrate)
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{
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u32 val;
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val = uclk / baudrate;
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writel(val / 16 - 1, &uart->ubrdiv);
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if (s5p_uart_divslot())
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writew(udivslot[val % 16], &uart->rest.slot);
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else
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writeb(val % 16, &uart->rest.value);
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}
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#ifndef CONFIG_SPL_BUILD
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int s5p_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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struct s5p_uart *const uart = plat->reg;
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u32 uclk;
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#ifdef CONFIG_CLK_EXYNOS
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struct clk clk;
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u32 ret;
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ret = clk_get_by_index(dev, 1, &clk);
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if (ret < 0)
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return ret;
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uclk = clk_get_rate(&clk);
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#else
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uclk = get_uart_clk(plat->port_id);
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#endif
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s5p_serial_baud(uart, uclk, baudrate);
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return 0;
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}
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static int s5p_serial_probe(struct udevice *dev)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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struct s5p_uart *const uart = plat->reg;
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s5p_serial_init(uart);
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return 0;
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}
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static int serial_err_check(const struct s5p_uart *const uart, int op)
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{
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unsigned int mask;
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/*
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* UERSTAT
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* Break Detect [3]
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* Frame Err [2] : receive operation
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* Parity Err [1] : receive operation
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* Overrun Err [0] : receive operation
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*/
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if (op)
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mask = 0x8;
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else
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mask = 0xf;
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return readl(&uart->uerstat) & mask;
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}
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static int s5p_serial_getc(struct udevice *dev)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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struct s5p_uart *const uart = plat->reg;
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if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
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return -EAGAIN;
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serial_err_check(uart, 0);
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return (int)(readb(&uart->urxh) & 0xff);
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}
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static int s5p_serial_putc(struct udevice *dev, const char ch)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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struct s5p_uart *const uart = plat->reg;
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if (readl(&uart->ufstat) & TX_FIFO_FULL)
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return -EAGAIN;
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writeb(ch, &uart->utxh);
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serial_err_check(uart, 1);
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return 0;
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}
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static int s5p_serial_pending(struct udevice *dev, bool input)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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struct s5p_uart *const uart = plat->reg;
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uint32_t ufstat = readl(&uart->ufstat);
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if (input)
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return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
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else
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return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
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}
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static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct s5p_serial_platdata *plat = dev->platdata;
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fdt_addr_t addr;
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addr = dev_get_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->reg = (struct s5p_uart *)addr;
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plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
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"id", dev->seq);
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return 0;
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}
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static const struct dm_serial_ops s5p_serial_ops = {
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.putc = s5p_serial_putc,
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.pending = s5p_serial_pending,
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.getc = s5p_serial_getc,
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.setbrg = s5p_serial_setbrg,
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};
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static const struct udevice_id s5p_serial_ids[] = {
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{ .compatible = "samsung,exynos4210-uart" },
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{ }
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};
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U_BOOT_DRIVER(serial_s5p) = {
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.name = "serial_s5p",
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.id = UCLASS_SERIAL,
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.of_match = s5p_serial_ids,
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.ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
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.probe = s5p_serial_probe,
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.ops = &s5p_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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#endif
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#ifdef CONFIG_DEBUG_UART_S5P
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
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s5p_serial_init(uart);
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s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
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}
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static inline void _debug_uart_putc(int ch)
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{
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struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
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while (readl(&uart->ufstat) & TX_FIFO_FULL);
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writeb(ch, &uart->utxh);
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}
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DEBUG_UART_FUNCS
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#endif
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