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https://github.com/brain-hackers/u-boot-brain
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cb7ea82059
Wire up ethernet controllers and enable MII and BOOTP options. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
22 lines
487 B
C
22 lines
487 B
C
/*
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* (C) Copyright 2014 - 2015 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _ASM_ARCH_SYS_PROTO_H
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#define _ASM_ARCH_SYS_PROTO_H
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/* Setup clk for network */
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static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
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{
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}
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int zynq_sdhci_init(unsigned long regbase);
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int zynq_slcr_get_mio_pin_status(const char *periph);
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unsigned int zynqmp_get_silicon_version(void);
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#endif /* _ASM_ARCH_SYS_PROTO_H */
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