mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-31 06:18:51 +09:00
145 lines
4.5 KiB
C
145 lines
4.5 KiB
C
/*
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* (C) Copyright 2009 mGine co.
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* unsik Kim <donari75@gmail.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MG_DISK_PRV_H__
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#define __MG_DISK_PRV_H__
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#include <mg_disk.h>
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/* name for block device */
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#define MG_DISK_NAME "mgd"
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/* name for platform device */
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#define MG_DEV_NAME "mg_disk"
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#define MG_DISK_MAJ 240
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#define MG_DISK_MAX_PART 16
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#define MG_SECTOR_SIZE 512
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#define MG_SECTOR_SIZE_MASK (512 - 1)
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#define MG_SECTOR_SIZE_SHIFT (9)
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#define MG_MAX_SECTS 256
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/* Register offsets */
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#define MG_BUFF_OFFSET 0x8000
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#define MG_STORAGE_BUFFER_SIZE 0x200
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#define MG_REG_OFFSET 0xC000
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#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
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#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
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#define MG_REG_SECT_CNT (MG_REG_OFFSET + 4)
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#define MG_REG_SECT_NUM (MG_REG_OFFSET + 6)
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#define MG_REG_CYL_LOW (MG_REG_OFFSET + 8)
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#define MG_REG_CYL_HIGH (MG_REG_OFFSET + 0xA)
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#define MG_REG_DRV_HEAD (MG_REG_OFFSET + 0xC)
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#define MG_REG_COMMAND (MG_REG_OFFSET + 0xE) /* write case */
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#define MG_REG_STATUS (MG_REG_OFFSET + 0xE) /* read case */
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#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
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#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
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/* "Drive Select/Head Register" bit values */
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#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
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#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
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/* "Device Control Register" bit values */
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#define MG_REG_CTRL_INTR_ENABLE 0x0
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#define MG_REG_CTRL_INTR_DISABLE (0x1 << 1)
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#define MG_REG_CTRL_RESET (0x1 << 2)
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1 << 4)
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1 << 5)
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#define MG_REG_CTRL_DPD_DISABLE 0x0
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#define MG_REG_CTRL_DPD_ENABLE (0x1 << 6)
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/* Status register bit */
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/* error bit in status register */
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#define MG_REG_STATUS_BIT_ERROR 0x01
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/* corrected error in status register */
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#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04
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/* data request bit in status register */
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#define MG_REG_STATUS_BIT_DATA_REQ 0x08
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/* DSC - Drive Seek Complete */
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#define MG_REG_STATUS_BIT_SEEK_DONE 0x10
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/* DWF - Drive Write Fault */
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#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20
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#define MG_REG_STATUS_BIT_READY 0x40
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#define MG_REG_STATUS_BIT_BUSY 0x80
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/* handy status */
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#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
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#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
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(MG_REG_STATUS_BIT_BUSY | \
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MG_REG_STATUS_BIT_WRITE_FAULT | \
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MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY)
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/* Error register */
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#define MG_REG_ERR_AMNF 0x01
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#define MG_REG_ERR_ABRT 0x04
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#define MG_REG_ERR_IDNF 0x10
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#define MG_REG_ERR_UNC 0x40
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#define MG_REG_ERR_BBK 0x80
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/* error code for others */
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#define MG_ERR_NONE 0
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#define MG_ERR_TIMEOUT 0x100
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#define MG_ERR_INIT_STAT 0x101
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#define MG_ERR_TRANSLATION 0x102
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#define MG_ERR_CTRL_RST 0x103
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#define MG_ERR_NO_DRV_DATA 0x104
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#define MG_MAX_ERRORS 16 /* Max read/write errors/sector */
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#define MG_RESET_FREQ 4 /* Reset controller every 4th retry */
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/* command */
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#define MG_CMD_RD 0x20
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#define MG_CMD_WR 0x30
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#define MG_CMD_SLEEP 0x99
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#define MG_CMD_WAKEUP 0xC3
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#define MG_CMD_ID 0xEC
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#define MG_CMD_WR_CONF 0x3C
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#define MG_CMD_RD_CONF 0x40
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union mg_uniwb{
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u16 w;
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u8 b[2];
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};
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/* main structure for mflash driver */
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struct mg_host {
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struct mg_drv_data *drv_data;
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/* for future use */
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};
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/*
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* Debugging macro and defines
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*/
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#undef DO_MG_DEBUG
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#ifdef DO_MG_DEBUG
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# define MG_DBG(fmt, args...) printf("%s:%d "fmt"\n", __func__, __LINE__,##args)
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#else /* CONFIG_MG_DEBUG */
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# define MG_DBG(fmt, args...) do { } while(0)
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#endif /* CONFIG_MG_DEBUG */
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#endif
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