mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-07 21:33:24 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
111 lines
2.6 KiB
ArmAsm
111 lines
2.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
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*/
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#include <asm-offsets.h>
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#include <config.h>
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#include <linux/linkage.h>
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#include <asm/arcregs.h>
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ENTRY(_start)
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/* Setup interrupt vector base that matches "__text_start" */
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sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
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; Disable/enable I-cache according to configuration
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lr r5, [ARC_BCR_IC_BUILD]
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breq r5, 0, 1f ; I$ doesn't exist
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lr r5, [ARC_AUX_IC_CTRL]
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#ifndef CONFIG_SYS_ICACHE_OFF
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bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
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#else
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bset r5, r5, 0 ; I$ exists, but is not used
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#endif
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sr r5, [ARC_AUX_IC_CTRL]
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mov r5, 1
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sr r5, [ARC_AUX_IC_IVIC]
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; As per ARC HS databook (see chapter 5.3.3.2)
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; it is required to add 3 NOPs after each write to IC_IVIC.
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nop
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nop
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nop
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1:
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; Disable/enable D-cache according to configuration
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lr r5, [ARC_BCR_DC_BUILD]
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breq r5, 0, 1f ; D$ doesn't exist
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lr r5, [ARC_AUX_DC_CTRL]
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bclr r5, r5, 6 ; Invalidate (discard w/o wback)
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#ifndef CONFIG_SYS_DCACHE_OFF
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bclr r5, r5, 0 ; Enable (+Inv)
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#else
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bset r5, r5, 0 ; Disable (+Inv)
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#endif
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sr r5, [ARC_AUX_DC_CTRL]
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mov r5, 1
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sr r5, [ARC_AUX_DC_IVDC]
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1:
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#ifdef CONFIG_ISA_ARCV2
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; Disable System-Level Cache (SLC)
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lr r5, [ARC_BCR_SLC]
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breq r5, 0, 1f ; SLC doesn't exist
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lr r5, [ARC_AUX_SLC_CTRL]
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bclr r5, r5, 6 ; Invalidate (discard w/o wback)
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bclr r5, r5, 0 ; Enable (+Inv)
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sr r5, [ARC_AUX_SLC_CTRL]
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1:
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#endif
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/* Establish C runtime stack and frame */
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mov %sp, CONFIG_SYS_INIT_SP_ADDR
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mov %fp, %sp
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/* Allocate reserved area from current top of stack */
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mov %r0, %sp
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bl board_init_f_alloc_reserve
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/* Set stack below reserved area, adjust frame pointer accordingly */
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mov %sp, %r0
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mov %fp, %sp
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/* Initialize reserved area - note: r0 already contains address */
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bl board_init_f_init_reserve
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/* Zero the one and only argument of "board_init_f" */
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mov_s %r0, 0
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bl board_init_f
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/* We only get here if relocation is disabled by GD_FLG_SKIP_RELOC */
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/* Make sure we don't lose GD overwritten by zero new GD */
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mov %r0, %r25
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mov %r1, 0
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bl board_init_r
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ENDPROC(_start)
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/*
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* void board_init_f_r_trampoline(stack-pointer address)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* r0 = new stack-pointer
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*/
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ENTRY(board_init_f_r_trampoline)
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/* Set up the stack- and frame-pointers */
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mov %sp, %r0
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mov %fp, %sp
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/* Update position of intterupt vector table */
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lr %r0, [ARC_AUX_INTR_VEC_BASE]
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ld %r1, [%r25, GD_RELOC_OFF]
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add %r0, %r0, %r1
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sr %r0, [ARC_AUX_INTR_VEC_BASE]
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/* Re-enter U-Boot by calling board_init_f_r */
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j board_init_f_r
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ENDPROC(board_init_f_r_trampoline)
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