mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
fb3862823b
Add device tree files for Agilex SoC platform. socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains Uboot specific DT properties. socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux (kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc) Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
40 lines
529 B
Plaintext
40 lines
529 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* U-Boot additions
|
|
*
|
|
* Copyright (C) 2019 Intel Corporation <www.intel.com>
|
|
*/
|
|
|
|
#include "socfpga_agilex-u-boot.dtsi"
|
|
|
|
/{
|
|
aliases {
|
|
spi0 = &qspi;
|
|
i2c0 = &i2c1;
|
|
};
|
|
|
|
memory {
|
|
/* 8GB */
|
|
reg = <0 0x00000000 0 0x80000000>,
|
|
<2 0x80000000 1 0x80000000>;
|
|
};
|
|
};
|
|
|
|
&flash0 {
|
|
compatible = "jedec,spi-nor";
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&i2c1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&mmc {
|
|
drvsel = <3>;
|
|
smplsel = <0>;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|